adding decoder logic
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132
src/peakrdl_busdecoder/decoder.py
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132
src/peakrdl_busdecoder/decoder.py
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from collections import deque
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from systemrdl.node import AddressableNode
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from systemrdl.walker import RDLListener, RDLSimpleWalker, WalkerAction
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from .body import Body, ForLoopBody, IfBody
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from .sv_int import SVInt
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class AddressDecode:
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def __init__(self, node: AddressableNode, addr_width: int) -> None:
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self._node = node
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self._addr_width = addr_width
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def walk(self) -> str:
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walker = RDLSimpleWalker()
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dlg = DecodeLogicGenerator(self)
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walker.walk(self._node, dlg, skip_top=True)
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return str(dlg)
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@property
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def node(self) -> AddressableNode:
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return self._node
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@property
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def addr_width(self) -> int:
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return self._addr_width
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class DecodeLogicGenerator(RDLListener):
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cpuif_addr_signal = "addr"
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cpuif_sel_prefix = "cpuif_"
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def __init__(
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self,
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address_decoder: AddressDecode,
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max_depth: int = 1,
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) -> None:
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self._address_decoder = address_decoder
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self._depth = 0
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self._max_depth = max_depth
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self._stack: list[Body] = [IfBody()]
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self._conditions: deque[str] = deque()
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self._select_signal = [f"{self.cpuif_sel_prefix}{address_decoder.node.inst_name}"]
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# Stack to keep track of array strides for nested arrayed components
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self._array_stride_stack: list[int] = []
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def enter_AddressableComponent(self, node: AddressableNode) -> WalkerAction | None:
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# Generate address bounds
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addr_width = self._address_decoder.addr_width
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l_bound = SVInt(
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node.raw_absolute_address - self._address_decoder.node.raw_absolute_address,
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addr_width,
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)
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u_bound = l_bound + SVInt(node.total_size, addr_width)
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# Handle arrayed components
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l_bound_str = str(l_bound)
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u_bound_str = str(u_bound)
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for i, stride in enumerate(self._array_stride_stack):
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l_bound_str += f" + (({addr_width})'(i{i}) * {SVInt(stride, addr_width)})"
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u_bound_str += f" + (({addr_width})'(i{i}) * {SVInt(stride, addr_width)})"
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# Generate condition string
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condition = (
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f"({self.cpuif_addr_signal} >= ({l_bound_str})) && ({self.cpuif_addr_signal} < ({u_bound_str}))"
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)
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if node.array_dimensions:
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assert node.array_stride is not None, "Array stride should be defined for arrayed components"
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# Collect strides for each array dimension
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current_stride = node.array_stride
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strides: list[int] = []
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for dim in reversed(node.array_dimensions):
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strides.append(current_stride)
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current_stride *= dim
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strides.reverse()
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self._array_stride_stack.extend(strides)
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# Generate condition string and manage stack
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signal = node.inst_name
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if isinstance(self._stack[-1], IfBody) and node.array_dimensions:
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# arrayed component with new if-body
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self._conditions.append(condition)
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for dim in node.array_dimensions:
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fb = ForLoopBody(
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"int",
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f"i{self._depth}",
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dim,
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)
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self._stack.append(fb)
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signal += f"[i{self._depth}]"
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self._depth += 1
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self._stack.append(IfBody())
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elif isinstance(self._stack[-1], IfBody):
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# non-arrayed component with if-body
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with self._stack[-1].cm(condition) as b:
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b += f"{'.'.join([*self._select_signal, signal])} = 1'b1;"
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self._select_signal.append(signal)
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# if node.external:
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# return WalkerAction.SkipDescendants
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return WalkerAction.Continue
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def exit_AddressableComponent(self, node: AddressableNode) -> None:
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self._select_signal.pop()
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if not node.array_dimensions:
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return
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ifb = self._stack.pop()
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self._stack[-1] += ifb
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for _ in node.array_dimensions:
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self._depth -= 1
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b = self._stack.pop()
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if b.lines:
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if isinstance(self._stack[-1], IfBody):
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with self._stack[-1].cm(self._conditions.pop()) as parent_b:
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parent_b += b
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else:
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self._stack[-1] += b
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self._array_stride_stack.pop()
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def __str__(self) -> str:
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return str(self._stack[-1])
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