Tests/cocotb (#19)
* wip * reorg * update sv int * apb4 working * apb3 working * version bump + ignore runner warning * remove redundant check * adding log on failure * cleaning up verilator version issue * devcontainer * Fix missing libpython in GitHub Actions CI environment (#21) * Initial plan * Install libpython in GitHub Actions for cocotb tests Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> --------- Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com> Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> --------- Co-authored-by: Copilot <198982749+Copilot@users.noreply.github.com>
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@@ -1,5 +1,8 @@
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"""Pytest wrapper launching the AXI4-Lite cocotb smoke test."""
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"""Pytest wrapper launching the AXI4-Lite cocotb smoke tests."""
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from __future__ import annotations
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import json
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from pathlib import Path
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import pytest
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@@ -11,20 +14,25 @@ try: # pragma: no cover - optional dependency shim
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except ImportError: # pragma: no cover
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from cocotb_tools.runner import get_runner
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from tests.cocotb_lib.utils import compile_rdl_and_export, get_verilog_sources
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from tests.cocotb_lib import RDL_CASES
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from tests.cocotb_lib.utils import get_verilog_sources, prepare_cpuif_case
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@pytest.mark.simulation
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@pytest.mark.verilator
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def test_axi4lite_smoke(tmp_path: Path) -> None:
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"""Compile the AXI4-Lite design and execute the cocotb smoke test."""
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@pytest.mark.parametrize(("rdl_file", "top_name"), RDL_CASES, ids=[case[1] for case in RDL_CASES])
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def test_axi4lite_smoke(tmp_path: Path, rdl_file: str, top_name: str) -> None:
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"""Compile each AXI4-Lite design variant and execute the cocotb smoke test."""
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repo_root = Path(__file__).resolve().parents[4]
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rdl_path = repo_root / "tests" / "cocotb_lib" / "rdl" / rdl_file
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build_root = tmp_path / top_name
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module_path, package_path = compile_rdl_and_export(
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str(repo_root / "tests" / "cocotb_lib" / "multiple_reg.rdl"),
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"multi_reg",
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tmp_path,
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module_path, package_path, config = prepare_cpuif_case(
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str(rdl_path),
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top_name,
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build_root,
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cpuif_cls=AXI4LiteCpuifFlat,
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control_signal="AWVALID",
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)
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sources = get_verilog_sources(
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@@ -34,17 +42,18 @@ def test_axi4lite_smoke(tmp_path: Path) -> None:
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)
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runner = get_runner("verilator")
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build_dir = tmp_path / "sim_build"
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sim_build = build_root / "sim_build"
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runner.build(
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sources=sources,
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hdl_toplevel=module_path.stem,
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build_dir=build_dir,
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build_dir=sim_build,
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)
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runner.test(
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hdl_toplevel=module_path.stem,
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test_module="tests.cocotb.axi4lite.smoke.test_register_access",
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build_dir=build_dir,
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log_file=str(tmp_path / "sim.log"),
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build_dir=sim_build,
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log_file=str(build_root / "simulation.log"),
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extra_env={"RDL_TEST_CONFIG": json.dumps(config)},
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)
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