decoder compiles

src/peakrdl_busdecoder/cpuif/apb3/apb3_cpuif.py

@@ -42,37 +42,4 @@ class APB3Cpuif(BaseCpuif):
         if idx is not None:
             return f"{base}[{idx}].{signal}"
 
-        raise ValueError("Must provide an index for arrayed interface signals")
-
-    def get_address_predicate(self, node: AddressableNode) -> str:
-        """
-        Returns a SystemVerilog expression that evaluates to true when the
-        address on the bus matches the address range of the given node.
-        """
-
-        addr_mask = (1 << self.addr_width) - 1
-        addr = node.absolute_address & addr_mask
-        size = node.size
-        if size == 0:
-            raise ValueError("Node size must be greater than 0")
-        if (addr % size) != 0:
-            raise ValueError("Node address must be aligned to its size")
-
-        # Calculate the address range of the node
-        addr_start = addr
-        addr_end = addr + size - 1
-        if addr_end > addr_mask:
-            raise ValueError("Node address range exceeds address width")
-
-        if addr_start == addr_end:
-            return f"({self.signal('PADDR')} == 'h{addr_start:X})"
-
-        return f"({self.signal('PADDR')} >= 'h{addr_start:X} && {self.signal('PADDR')} <= 'h{addr_end:X})"
-
-    def get_address_decode_condition(self, node: AddressableNode) -> str:
-        """
-        Returns a SystemVerilog expression that evaluates to true when the
-        address on the bus matches the address range of the given node.
-        """
-        addr_pred = self.get_address_predicate(node)
-        return addr_pred
+        raise ValueError("Must provide an index for arrayed interface signals")