Dev/downsize apb paddr (#27)
* Downsize paddr bits * Updated Test suite to use offset aligned address * fix for apb3 and axi4lite * modified structure to pass hierarchy information --------- Co-authored-by: Byron Lathi <bslathi19@gmail.com>
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@@ -1,5 +1,6 @@
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import inspect
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import os
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from collections import deque
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from typing import TYPE_CHECKING
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import jinja2 as jj
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@@ -106,7 +107,7 @@ class BaseCpuif:
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return f"({cpuif_addr} - 'h{addr:x})[{clog2(size) - 1}:0]"
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def fanout(self, node: AddressableNode) -> str:
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def fanout(self, node: AddressableNode, array_stack: deque[int]) -> str:
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raise NotImplementedError
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def fanin(self, node: AddressableNode | None = None) -> str:
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