Dev/downsize apb paddr (#27)

* Downsize paddr bits

* Updated Test suite to use offset aligned address

* fix for apb3 and axi4lite

* modified structure to pass hierarchy information

---------

Co-authored-by: Byron Lathi <bslathi19@gmail.com>
This commit is contained in:
Arnav Sacheti
2025-12-04 21:31:44 -08:00
committed by GitHub
parent 9f41487430
commit c63b2cbab2
16 changed files with 89 additions and 26 deletions

View File

@@ -1,5 +1,6 @@
import inspect
import os
from collections import deque
from typing import TYPE_CHECKING
import jinja2 as jj
@@ -106,7 +107,7 @@ class BaseCpuif:
return f"({cpuif_addr} - 'h{addr:x})[{clog2(size) - 1}:0]"
def fanout(self, node: AddressableNode) -> str:
def fanout(self, node: AddressableNode, array_stack: deque[int]) -> str:
raise NotImplementedError
def fanin(self, node: AddressableNode | None = None) -> str: