set cpuif_data_width for non-external components (#42)
* set cpuif_data_width for non-external components * update tests to actually work now * version bump
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@@ -122,3 +122,43 @@ class TestDesignState:
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# Should infer 32-bit data width from field
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assert ds.cpuif_data_width == 32
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def test_design_state_accesswidth_64(self, compile_rdl: Callable[..., AddrmapNode]) -> None:
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"""Test DesignState with explicit 64-bit access width."""
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rdl_source = """
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addrmap test {
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reg {
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regwidth = 64;
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accesswidth = 64;
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field {
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sw=rw;
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hw=r;
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} data[63:0];
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} my_reg @ 0x0;
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};
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"""
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top = compile_rdl(rdl_source, top="test")
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ds = DesignState(top, {})
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assert ds.cpuif_data_width == 64
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def test_design_state_accesswidth_128(self, compile_rdl: Callable[..., AddrmapNode]) -> None:
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"""Test DesignState with explicit 128-bit access width."""
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rdl_source = """
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addrmap test {
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reg {
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regwidth = 128;
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accesswidth = 128;
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field {
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sw=rw;
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hw=r;
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} data[127:0];
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} my_reg @ 0x0;
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};
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"""
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top = compile_rdl(rdl_source, top="test")
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ds = DesignState(top, {})
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assert ds.cpuif_data_width == 128
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