[![Documentation Status](https://readthedocs.org/projects/peakrdl-busdecoder/badge/?version=latest)](http://peakrdl-busdecoder.readthedocs.io) [![build](https://github.com/arnavsacheti/PeakRDL-busdecoder/workflows/build/badge.svg)](https://github.com/arnavsacheti/PeakRDL-busdecoder/actions?query=workflow%3Abuild+branch%3Amain) [![Coverage Status](https://coveralls.io/repos/github/arnavsacheti/PeakRDL-busdecoder/badge.svg?branch=main)](https://coveralls.io/github/arnavsacheti/PeakRDL-busdecoder?branch=main) [![PyPI - Python Version](https://img.shields.io/pypi/pyversions/peakrdl-busdecoder.svg)](https://pypi.org/project/peakrdl-busdecoder) # PeakRDL-busdecoder Compile SystemRDL into a SystemVerilog control/status register (CSR) block. For the command line tool, see the [PeakRDL project](https://peakrdl.readthedocs.io). ## Documentation See the [PeakRDL-busdecoder Documentation](https://peakrdl-busdecoder.readthedocs.io) for more details