d7481e71ba
* Initial plan * Fix max_decode_depth to properly control decoder hierarchy and port generation Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Fix test that relied on old depth behavior Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Update documentation for max_decode_depth parameter Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * fix format * Add variable_depth RDL file and smoke tests for max_decode_depth parameter Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Add variable depth tests for APB3 and AXI4-Lite CPUIFs Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * fix * fix * bump --------- Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com> Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com>
76 lines
2.4 KiB
Python
76 lines
2.4 KiB
Python
from collections import deque
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from typing import TYPE_CHECKING
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from systemrdl.node import AddressableNode
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from systemrdl.walker import WalkerAction
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from ..body import Body, CombinationalBody, ForLoopBody, IfBody
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from ..design_state import DesignState
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from ..listener import BusDecoderListener
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from ..utils import get_indexed_path
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if TYPE_CHECKING:
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from .base_cpuif import BaseCpuif
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class FaninGenerator(BusDecoderListener):
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def __init__(self, ds: DesignState, cpuif: "BaseCpuif") -> None:
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super().__init__(ds)
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self._cpuif = cpuif
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self._stack: deque[Body] = deque()
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cb = CombinationalBody()
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cb += cpuif.fanin()
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cb += cpuif.readback()
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self._stack.append(cb)
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def enter_AddressableComponent(self, node: AddressableNode) -> WalkerAction | None:
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action = super().enter_AddressableComponent(node)
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should_generate = action == WalkerAction.SkipDescendants
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if not should_generate and self._ds.max_decode_depth == 0:
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for child in node.children():
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if isinstance(child, AddressableNode):
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break
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else:
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should_generate = True
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if not should_generate:
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return action
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if node.array_dimensions:
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for i, dim in enumerate(node.array_dimensions):
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fb = ForLoopBody(
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"int",
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f"i{i}",
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dim,
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)
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self._stack.append(fb)
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ifb = IfBody()
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with ifb.cm(
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f"cpuif_rd_sel.{get_indexed_path(self._cpuif.exp.ds.top_node, node)} || cpuif_wr_sel.{get_indexed_path(self._cpuif.exp.ds.top_node, node)}"
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) as b:
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b += self._cpuif.fanin(node)
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self._stack[-1] += ifb
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ifb = IfBody()
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with ifb.cm(f"cpuif_rd_sel.{get_indexed_path(self._cpuif.exp.ds.top_node, node)}") as b:
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b += self._cpuif.readback(node)
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self._stack[-1] += ifb
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return action
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def exit_AddressableComponent(self, node: AddressableNode) -> None:
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if node.array_dimensions:
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for _ in node.array_dimensions:
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b = self._stack.pop()
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if not b:
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continue
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self._stack[-1] += b
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super().exit_AddressableComponent(node)
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def __str__(self) -> str:
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return "\n".join(map(str, self._stack))
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