129 lines
3.2 KiB
Systemverilog
129 lines
3.2 KiB
Systemverilog
{% extends "lib/tb_base.sv" %}
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{%- block declarations %}
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logic root_cpuif_reset;
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logic [15:0] r5f2_resetvalue;
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{%- endblock %}
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{%- block clocking_dirs %}
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output root_cpuif_reset;
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output r5f2_resetvalue;
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{%- endblock %}
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{% block seq %}
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{% sv_line_anchor %}
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cb.root_cpuif_reset <= '1;
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cb.hwif_in.r2.my_reset <= '1;
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cb.hwif_in.r3.my_areset <= '1;
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cb.hwif_in.r4.my_reset_n <= '0;
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cb.hwif_in.r5.my_areset_n <= '0;
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cb.hwif_in.f2_reset <= '1;
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cb.r5f2_resetvalue <= 'hABCD;
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##2;
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cb.rst <= '0;
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cb.root_cpuif_reset <= '0;
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cb.hwif_in.r2.my_reset <= '0;
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cb.hwif_in.r3.my_areset <= '0;
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cb.hwif_in.r4.my_reset_n <= '1;
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cb.hwif_in.r5.my_areset_n <= '1;
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cb.hwif_in.f2_reset <= '0;
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##1;
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cpuif.assert_read('h00, 'h5678_1234);
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cpuif.assert_read('h04, 'h5678_1234);
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cpuif.assert_read('h08, 'h5678_1234);
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cpuif.assert_read('h0c, 'h5678_1234);
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cpuif.assert_read('h10, 'hABCD_1234);
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for(int i=0; i<5; i++) cpuif.write(i*4, 0);
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cpuif.assert_read('h00, 'h0000_0000);
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cpuif.assert_read('h04, 'h0000_0000);
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cpuif.assert_read('h08, 'h0000_0000);
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cpuif.assert_read('h0c, 'h0000_0000);
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cpuif.assert_read('h10, 'h0000_0000);
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cb.rst <= '1;
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@cb;
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cb.rst <= '0;
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@cb;
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cpuif.assert_read('h00, 'h0000_1234);
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cpuif.assert_read('h04, 'h0000_0000);
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cpuif.assert_read('h08, 'h0000_0000);
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cpuif.assert_read('h0c, 'h0000_0000);
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cpuif.assert_read('h10, 'h0000_0000);
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for(int i=0; i<5; i++) cpuif.write(i*4, 0);
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cb.hwif_in.r2.my_reset <= '1;
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@cb;
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cb.hwif_in.r2.my_reset <= '0;
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@cb;
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cpuif.assert_read('h00, 'h0000_0000);
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cpuif.assert_read('h04, 'h0000_1234);
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cpuif.assert_read('h08, 'h0000_0000);
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cpuif.assert_read('h0c, 'h0000_0000);
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cpuif.assert_read('h10, 'h0000_0000);
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for(int i=0; i<5; i++) cpuif.write(i*4, 0);
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##1;
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#2ns;
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hwif_in.r3.my_areset = '1;
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#1ns;
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hwif_in.r3.my_areset = '0;
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##1;
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cpuif.assert_read('h00, 'h0000_0000);
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cpuif.assert_read('h04, 'h0000_0000);
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cpuif.assert_read('h08, 'h0000_1234);
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cpuif.assert_read('h0c, 'h0000_0000);
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cpuif.assert_read('h10, 'h0000_0000);
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for(int i=0; i<5; i++) cpuif.write(i*4, 0);
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cb.hwif_in.r4.my_reset_n <= '0;
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@cb;
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cb.hwif_in.r4.my_reset_n <= '1;
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@cb;
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cpuif.assert_read('h00, 'h0000_0000);
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cpuif.assert_read('h04, 'h0000_0000);
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cpuif.assert_read('h08, 'h0000_0000);
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cpuif.assert_read('h0c, 'h0000_1234);
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cpuif.assert_read('h10, 'h0000_0000);
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for(int i=0; i<5; i++) cpuif.write(i*4, 0);
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##1;
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#2ns;
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hwif_in.r5.my_areset_n = '0;
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#1ns;
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hwif_in.r5.my_areset_n = '1;
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##1;
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cpuif.assert_read('h00, 'h0000_0000);
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cpuif.assert_read('h04, 'h0000_0000);
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cpuif.assert_read('h08, 'h0000_0000);
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cpuif.assert_read('h0c, 'h0000_0000);
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cpuif.assert_read('h10, 'h0000_1234);
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for(int i=0; i<5; i++) cpuif.write(i*4, 0);
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@cb;
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cb.hwif_in.f2_reset <= '1;
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cb.r5f2_resetvalue <= 'h3210;
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@cb;
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cb.hwif_in.f2_reset <= '0;
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cpuif.assert_read('h00, 'h5678_0000);
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cpuif.assert_read('h04, 'h5678_0000);
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cpuif.assert_read('h08, 'h5678_0000);
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cpuif.assert_read('h0c, 'h5678_0000);
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cpuif.assert_read('h10, 'h3210_0000);
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{% endblock %}
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