4dc61d24ca
* Initial plan * Add cocotb test infrastructure and testbenches for APB3, APB4, and AXI4-Lite Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Add integration tests, examples, and documentation for cocotb testbenches Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Address code review feedback: use relative imports and update installation docs Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Add implementation summary document Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Merge cocotb dependencies into test group Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> * Add optional cocotb simulation workflow with Icarus Verilog Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com> --------- Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com> Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com>
88 lines
2.3 KiB
Markdown
88 lines
2.3 KiB
Markdown
# Tests
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The bus decoder exporter includes comprehensive test suites to validate both the
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Python implementation and the generated SystemVerilog RTL.
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## Unit Tests
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The unit test suite is built around `pytest` and exercises the Python implementation
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directly using the [`systemrdl-compiler`](https://github.com/SystemRDL/systemrdl-compiler)
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package to elaborate inline SystemRDL snippets.
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### Install dependencies
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Create an isolated environment if desired and install the minimal requirements:
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```bash
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# Using uv (recommended)
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uv sync --group test
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# Or using pip
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python -m pip install -e . parameterized pytest pytest-cov pytest-xdist
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```
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### Running the suite
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Invoke `pytest` from the repository root (or the `tests` directory) and point it
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at the unit tests:
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```bash
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pytest tests/unit
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```
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Pytest will automatically discover tests that follow the `test_*.py` naming
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pattern and can make use of the `compile_rdl` fixture defined in
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`tests/unit/conftest.py` to compile inline SystemRDL sources.
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## Cocotb Integration Tests
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The cocotb test suite validates the functionality of generated SystemVerilog RTL
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through simulation. These tests generate bus decoders for different CPU interfaces
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(APB3, APB4, AXI4-Lite) and verify that read/write operations work correctly.
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### Install dependencies
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```bash
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# Install with cocotb support using uv (recommended)
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uv sync --group test
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# Or using pip
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python -m pip install -e . parameterized pytest pytest-cov pytest-xdist cocotb cocotb-bus
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# Install HDL simulator (choose one)
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apt-get install iverilog # Icarus Verilog
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apt-get install verilator # Verilator
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```
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### Running the tests
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#### Integration tests (no simulator required)
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These tests validate code generation without requiring an HDL simulator:
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```bash
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pytest tests/cocotb/testbenches/test_integration.py -v
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```
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#### Example code generation
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Run examples to see generated code for different configurations:
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```bash
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python tests/cocotb/examples.py
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```
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#### Full simulation tests (requires simulator)
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To run the full cocotb simulation tests:
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```bash
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# Run all cocotb simulation tests
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pytest tests/cocotb/testbenches/test_*_runner.py -v
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# Run specific interface tests
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pytest tests/cocotb/testbenches/test_apb4_runner.py -v
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```
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For more information about cocotb tests, see [`tests/cocotb/README.md`](cocotb/README.md).
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