60 lines
1.9 KiB
ReStructuredText
60 lines
1.9 KiB
ReStructuredText
AMBA APB
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========
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Both APB3 and APB4 standards are supported.
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.. warning::
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Some IP vendors will incorrectly implement the address signalling
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assuming word-addresses. (that each increment of ``PADDR`` is the next word)
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For this exporter, values on the interface's ``PADDR`` input are interpreted
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as byte-addresses. (an APB interface with 32-bit wide data increments
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``PADDR`` in steps of 4 for every word). Even though APB protocol does not
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allow for unaligned transfers, this is in accordance to the official AMBA
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specification.
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Be sure to double-check the interpretation of your interconnect IP. A simple
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bit-shift operation can be used to correct this if necessary.
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APB3
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----
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Implements the register block using an
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`AMBA 3 APB <https://developer.arm.com/documentation/ihi0024/b/Introduction/About-the-AMBA-3-APB>`_
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CPU interface.
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The APB3 CPU interface comes in two i/o port flavors:
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SystemVerilog Interface
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* Command line: ``--cpuif apb3``
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* Interface Definition: :download:`apb3_intf.sv <../../hdl-src/apb3_intf.sv>`
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* Class: :class:`peakrdl_regblock.cpuif.apb3.APB3_Cpuif`
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Flattened inputs/outputs
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Flattens the interface into discrete input and output ports.
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* Command line: ``--cpuif apb3-flat``
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* Class: :class:`peakrdl_regblock.cpuif.apb3.APB3_Cpuif_flattened`
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APB4
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----
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Implements the register block using an
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`AMBA 4 APB <https://developer.arm.com/documentation/ihi0024/d/?lang=en>`_
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CPU interface.
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The APB4 CPU interface comes in two i/o port flavors:
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SystemVerilog Interface
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* Command line: ``--cpuif apb4``
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* Interface Definition: :download:`apb4_intf.sv <../../hdl-src/apb4_intf.sv>`
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* Class: :class:`peakrdl_regblock.cpuif.apb4.APB4_Cpuif`
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Flattened inputs/outputs
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Flattens the interface into discrete input and output ports.
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* Command line: ``--cpuif apb4-flat``
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* Class: :class:`peakrdl_regblock.cpuif.apb4.APB4_Cpuif_flattened`
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