183 lines
4.5 KiB
ReStructuredText
183 lines
4.5 KiB
ReStructuredText
RHS Property References
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=======================
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SystemRDL allows some properties to be referenced in the righthand-side of
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property assignment expressions:
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.. code-block:: systemrdl
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some_property = my_reg.my_field -> some_property;
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The official SystemRDL spec refers to these as "Ref targets" in Table G1, but
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unfortunately does not describe their semantics in much detail.
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The text below describes the interpretations used for this exporter.
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--------------------------------------------------------------------------------
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Field
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-----
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field -> swacc
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^^^^^^^^^^^^^^
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Single-cycle strobe that indicates the field is being accessed by software
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(read or write).
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field -> swmod
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^^^^^^^^^^^^^^^
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Single-cycle strobe that indicates the field is being modified during a software
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access operation.
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field -> swwe/swwel
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^^^^^^^^^^^^^^^^^^^
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Represents the signal that controls the field's swwe/swwel behavior.
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field -> anded/ored/xored
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^^^^^^^^^^^^^^^^^^^^^^^^^
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Represents the current and/or/xor reduction of the field's value.
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field -> hwclr/hwset
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^^^^^^^^^^^^^^^^^^^^
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|EX|
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Represents the signal that controls the field's hwclr/hwset behavior.
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field -> hwenable/hwmask
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^^^^^^^^^^^^^^^^^^^^^^^^
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Represents the signal that controls the field's hwenable/hwmask behavior.
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field -> we/wel
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^^^^^^^^^^^^^^^
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Represents the signal that controls the field's we/wel behavior.
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field -> next
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^^^^^^^^^^^^^
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|EX|
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field -> reset
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^^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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field -> resetsignal
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^^^^^^^^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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--------------------------------------------------------------------------------
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Field Counter Properties
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------------------------
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field -> incr
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^^^^^^^^^^^^^
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Represents the signal that controls the field's counter increment control.
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field -> incrsaturate/saturate
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Represents the internal 1-bit event signal that indicates whether the counter is saturated
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at its saturation value.
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.. wavedrom::
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{
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"signal": [
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{"name": "clk", "wave": "p......"},
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{"name": "hwif_in..decr", "wave": "0101010"},
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{"name": "<counter>", "wave": "=.=....", "data": [1,0]},
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{"name": "<decrsaturate>", "wave": "0.1...."}
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],
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"foot": {
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"text": "A 4-bit counter saturating"
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}
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}
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field -> incrthreshold/threshold
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Represents the 1-bit event signal that indicates whether the counter has met or
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exceeded its incrthreshold.
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field -> incrvalue
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^^^^^^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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field -> overflow
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^^^^^^^^^^^^^^^^^
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Represents the event signal that is asserted when the counter is about to wrap.
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field -> decr
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^^^^^^^^^^^^^
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Represents the signal that controls the field's counter decrement control.
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field -> decrsaturate
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^^^^^^^^^^^^^^^^^^^^^
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Represents the internal 1-bit event signal that indicates whether the counter is saturated
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at its saturation value.
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.. wavedrom::
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{
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"signal": [
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{"name": "clk", "wave": "p......"},
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{"name": "hwif_in..incr", "wave": "0101010"},
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{"name": "<counter>", "wave": "=.=....", "data": [14,15]},
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{"name": "<incrsaturate>", "wave": "0.1...."}
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],
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"foot": {
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"text": "A 4-bit counter saturating"
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}
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}
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field -> decrthreshold
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^^^^^^^^^^^^^^^^^^^^^^
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Represents the 1-bit event signal that indicates whether the counter has met or
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exceeded its incrthreshold.
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field -> decrvalue
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^^^^^^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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field -> underflow
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^^^^^^^^^^^^^^^^^^
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Represents the event signal that is asserted when the counter is about to wrap.
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--------------------------------------------------------------------------------
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Field Interrupt Properties
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--------------------------
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field -> enable
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^^^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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field -> mask
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^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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field -> haltenable
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^^^^^^^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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field -> haltmask
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^^^^^^^^^^^^^^^^^
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Represents the value that was assigned to this property.
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--------------------------------------------------------------------------------
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Register
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--------
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reg -> intr
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^^^^^^^^^^^
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References the register's ``hwif_out..intr`` signal.
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reg -> halt
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^^^^^^^^^^^
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References the register's ``hwif_out..halt`` signal.
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