139 lines
4.7 KiB
Python
139 lines
4.7 KiB
Python
"""APB4 smoke tests using generated multi-register design."""
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import cocotb
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from cocotb.triggers import Timer
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WRITE_ADDR = 0x4
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READ_ADDR = 0x8
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WRITE_DATA = 0x1234_5678
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READ_DATA = 0x89AB_CDEF
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class _Apb4SlaveShim:
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def __init__(self, dut):
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prefix = "s_apb"
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self.PSEL = getattr(dut, f"{prefix}_PSELx")
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self.PENABLE = getattr(dut, f"{prefix}_PENABLE")
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self.PWRITE = getattr(dut, f"{prefix}_PWRITE")
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self.PADDR = getattr(dut, f"{prefix}_PADDR")
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self.PPROT = getattr(dut, f"{prefix}_PPROT")
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self.PWDATA = getattr(dut, f"{prefix}_PWDATA")
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self.PSTRB = getattr(dut, f"{prefix}_PSTRB")
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self.PRDATA = getattr(dut, f"{prefix}_PRDATA")
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self.PREADY = getattr(dut, f"{prefix}_PREADY")
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self.PSLVERR = getattr(dut, f"{prefix}_PSLVERR")
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class _Apb4MasterShim:
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def __init__(self, dut, base: str):
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self.PSEL = getattr(dut, f"{base}_PSELx")
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self.PENABLE = getattr(dut, f"{base}_PENABLE")
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self.PWRITE = getattr(dut, f"{base}_PWRITE")
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self.PADDR = getattr(dut, f"{base}_PADDR")
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self.PPROT = getattr(dut, f"{base}_PPROT")
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self.PWDATA = getattr(dut, f"{base}_PWDATA")
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self.PSTRB = getattr(dut, f"{base}_PSTRB")
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self.PRDATA = getattr(dut, f"{base}_PRDATA")
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self.PREADY = getattr(dut, f"{base}_PREADY")
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self.PSLVERR = getattr(dut, f"{base}_PSLVERR")
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def _apb4_slave(dut):
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return getattr(dut, "s_apb", None) or _Apb4SlaveShim(dut)
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def _apb4_master(dut, base: str):
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return getattr(dut, base, None) or _Apb4MasterShim(dut, base)
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@cocotb.test()
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async def test_apb4_read_write_paths(dut):
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"""Drive APB4 slave signals and observe master activity."""
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s_apb = _apb4_slave(dut)
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masters = {
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"reg1": _apb4_master(dut, "m_apb_reg1"),
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"reg2": _apb4_master(dut, "m_apb_reg2"),
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"reg3": _apb4_master(dut, "m_apb_reg3"),
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}
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# Default slave side inputs
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s_apb.PSEL.value = 0
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s_apb.PENABLE.value = 0
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s_apb.PWRITE.value = 0
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s_apb.PADDR.value = 0
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s_apb.PWDATA.value = 0
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s_apb.PPROT.value = 0
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s_apb.PSTRB.value = 0
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for master in masters.values():
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master.PRDATA.value = 0
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master.PREADY.value = 0
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master.PSLVERR.value = 0
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await Timer(1, units="ns")
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# ------------------------------------------------------------------
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# Write transfer to reg2
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# ------------------------------------------------------------------
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masters["reg2"].PREADY.value = 1
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s_apb.PADDR.value = WRITE_ADDR
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s_apb.PWDATA.value = WRITE_DATA
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s_apb.PSTRB.value = 0xF
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s_apb.PPROT.value = 0
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s_apb.PWRITE.value = 1
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s_apb.PSEL.value = 1
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s_apb.PENABLE.value = 1
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await Timer(1, units="ns")
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assert int(masters["reg2"].PSEL.value) == 1, "reg2 must be selected for write"
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assert int(masters["reg2"].PWRITE.value) == 1, "Write strobes should propagate"
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assert int(masters["reg2"].PADDR.value) == WRITE_ADDR, "Address should fan out"
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assert int(masters["reg2"].PWDATA.value) == WRITE_DATA, "Write data should fan out"
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for name, master in masters.items():
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if name != "reg2":
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assert int(master.PSEL.value) == 0, f"{name} should remain idle on write"
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assert int(s_apb.PREADY.value) == 1, "Ready should mirror selected master"
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assert int(s_apb.PSLVERR.value) == 0, "No error expected on successful write"
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# Return to idle
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s_apb.PSEL.value = 0
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s_apb.PENABLE.value = 0
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s_apb.PWRITE.value = 0
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masters["reg2"].PREADY.value = 0
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await Timer(1, units="ns")
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# ------------------------------------------------------------------
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# Read transfer from reg3
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# ------------------------------------------------------------------
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masters["reg3"].PRDATA.value = READ_DATA
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masters["reg3"].PREADY.value = 1
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masters["reg3"].PSLVERR.value = 0
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s_apb.PADDR.value = READ_ADDR
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s_apb.PSEL.value = 1
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s_apb.PENABLE.value = 1
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s_apb.PWRITE.value = 0
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await Timer(1, units="ns")
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assert int(masters["reg3"].PSEL.value) == 1, "reg3 must be selected for read"
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assert int(masters["reg3"].PWRITE.value) == 0, "Read should deassert write"
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assert int(masters["reg3"].PADDR.value) == READ_ADDR, "Read address should propagate"
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for name, master in masters.items():
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if name != "reg3":
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assert int(master.PSEL.value) == 0, f"{name} should remain idle on read"
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assert int(s_apb.PRDATA.value) == READ_DATA, "Read data should return from master"
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assert int(s_apb.PREADY.value) == 1, "Ready must follow selected master"
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assert int(s_apb.PSLVERR.value) == 0, "No error expected on successful read"
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# Back to idle
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s_apb.PSEL.value = 0
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s_apb.PENABLE.value = 0
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masters["reg3"].PREADY.value = 0
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await Timer(1, units="ns")
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