23 lines
549 B
Systemverilog
23 lines
549 B
Systemverilog
{% extends "lib/tb_base.sv" %}
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{% block seq %}
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{% sv_line_anchor %}
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##1;
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cb.rst <= '0;
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##1;
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// check enum values
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assert(busdecoder_pkg::top__my_enum__val_1 == 'd3);
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assert(busdecoder_pkg::top__my_enum__val_2 == 'd4);
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// check initial conditions
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cpuif.assert_read('h0, busdecoder_pkg::top__my_enum__val_2);
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//---------------------------------
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// set r0 = val_1
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cpuif.write('h0, busdecoder_pkg::top__my_enum__val_1);
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cpuif.assert_read('h0, busdecoder_pkg::top__my_enum__val_1);
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{% endblock %}
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