139 lines
4.4 KiB
Systemverilog
139 lines
4.4 KiB
Systemverilog
interface avalon_mm_intf_driver #(
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parameter DATA_WIDTH = 32,
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parameter ADDR_WIDTH = 32
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)(
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input wire clk,
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input wire rst,
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avalon_mm_intf.host avalon
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);
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timeunit 1ps;
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timeprecision 1ps;
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localparam ADDR_PAD = $clog2(DATA_WIDTH/8);
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localparam WORD_ADDR_WIDTH = ADDR_WIDTH - ADDR_PAD;
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logic av_read;
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logic av_write;
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logic av_waitrequest;
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logic [WORD_ADDR_WIDTH-1:0] av_address;
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logic [DATA_WIDTH-1:0] av_writedata;
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logic [DATA_WIDTH/8-1:0] av_byteenable;
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logic av_readdatavalid;
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logic av_writeresponsevalid;
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logic [DATA_WIDTH-1:0] av_readdata;
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logic [1:0] av_response;
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assign avalon.read = av_read;
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assign avalon.write = av_write;
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assign av_waitrequest = avalon.waitrequest;
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assign avalon.address = av_address;
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assign avalon.writedata = av_writedata;
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assign avalon.byteenable = av_byteenable;
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assign av_readdatavalid = avalon.readdatavalid;
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assign av_writeresponsevalid = avalon.writeresponsevalid;
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assign av_readdata = avalon.readdata;
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assign av_response = avalon.response;
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default clocking cb @(posedge clk);
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default input #1step output #1;
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output av_read;
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output av_write;
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input av_waitrequest;
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output av_address;
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output av_writedata;
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output av_byteenable;
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input av_readdatavalid;
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input av_writeresponsevalid;
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input av_readdata;
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input av_response;
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endclocking
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task automatic reset();
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cb.av_read <= '0;
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cb.av_write <= '0;
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cb.av_address <= '0;
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cb.av_writedata <= '0;
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cb.av_byteenable <= '0;
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endtask
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semaphore req_mutex = new(1);
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semaphore resp_mutex = new(1);
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task automatic write(logic [ADDR_WIDTH-1:0] addr, logic [DATA_WIDTH-1:0] data, logic [DATA_WIDTH/8-1:0] strb = '1);
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fork
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begin
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req_mutex.get();
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##0;
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// Initiate transfer
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cb.av_write <= '1;
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cb.av_address <= (addr >> ADDR_PAD);
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cb.av_writedata <= data;
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cb.av_byteenable <= strb;
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@(cb);
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// Wait for transfer to be accepted
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while(cb.av_waitrequest == 1'b1) @(cb);
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reset();
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req_mutex.put();
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end
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begin
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resp_mutex.get();
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@cb;
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// Wait for response
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while(cb.av_writeresponsevalid !== 1'b1) @(cb);
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assert(!$isunknown(cb.av_response)) else $error("Read from 0x%0x returned X's on av_response", addr);
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resp_mutex.put();
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end
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join
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endtask
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task automatic read(logic [ADDR_WIDTH-1:0] addr, output logic [DATA_WIDTH-1:0] data);
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fork
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begin
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req_mutex.get();
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##0;
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// Initiate transfer
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cb.av_read <= '1;
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cb.av_address <= (addr >> ADDR_PAD);
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@(cb);
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// Wait for transfer to be accepted
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while(cb.av_waitrequest == 1'b1) @(cb);
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reset();
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req_mutex.put();
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end
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begin
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resp_mutex.get();
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@cb;
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// Wait for response
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while(cb.av_readdatavalid !== 1'b1) @(cb);
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assert(!$isunknown(cb.av_readdata)) else $error("Read from 0x%0x returned X's on av_response", av_readdata);
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assert(!$isunknown(cb.av_response)) else $error("Read from 0x%0x returned X's on av_response", addr);
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data = cb.av_readdata;
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resp_mutex.put();
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end
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join
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endtask
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task automatic assert_read(logic [ADDR_WIDTH-1:0] addr, logic [DATA_WIDTH-1:0] expected_data, logic [DATA_WIDTH-1:0] mask = '1);
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logic [DATA_WIDTH-1:0] data;
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read(addr, data);
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data &= mask;
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assert(data == expected_data) else $error("Read from 0x%x returned 0x%x. Expected 0x%x", addr, data, expected_data);
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endtask
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initial begin
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reset();
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end
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initial forever begin
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@cb;
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if(!rst) assert(!$isunknown(cb.av_waitrequest)) else $error("Saw X on av_waitrequest!");
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if(!rst) assert(!$isunknown(cb.av_readdatavalid)) else $error("Saw X on av_readdatavalid!");
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if(!rst) assert(!$isunknown(cb.av_writeresponsevalid)) else $error("Saw X on av_writeresponsevalid!");
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end
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endinterface
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