1e09da6dbf
Fix APB PREADY signal to assert during error conditions Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com> Co-authored-by: arnavsacheti <36746504+arnavsacheti@users.noreply.github.com>
86 lines
3.3 KiB
Python
86 lines
3.3 KiB
Python
from collections import deque
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from typing import TYPE_CHECKING
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from systemrdl.node import AddressableNode
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from ...sv_int import SVInt
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from ...utils import clog2, get_indexed_path
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from ..base_cpuif import BaseCpuif
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from .apb4_interface import APB4FlatInterface
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if TYPE_CHECKING:
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from ...exporter import BusDecoderExporter
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class APB4CpuifFlat(BaseCpuif):
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template_path = "apb4_tmpl.sv"
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def __init__(self, exp: "BusDecoderExporter") -> None:
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super().__init__(exp)
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self._interface = APB4FlatInterface(self)
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@property
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def is_interface(self) -> bool:
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return self._interface.is_interface
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@property
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def port_declaration(self) -> str:
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return self._interface.get_port_declaration("s_apb_", "m_apb_")
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def signal(
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self,
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signal: str,
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node: AddressableNode | None = None,
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idx: str | int | None = None,
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) -> str:
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return self._interface.signal(signal, node, idx)
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def fanout(self, node: AddressableNode, array_stack: deque[int]) -> str:
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fanout: dict[str, str] = {}
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addr_comp = [f"{self.signal('PADDR')}"]
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for i, stride in enumerate(array_stack):
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addr_comp.append(f"(gi{i}*{SVInt(stride, self.addr_width)})")
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fanout[self.signal("PSEL", node, "gi")] = (
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f"cpuif_wr_sel.{get_indexed_path(self.exp.ds.top_node, node, 'gi')}|cpuif_rd_sel.{get_indexed_path(self.exp.ds.top_node, node, 'gi')}"
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)
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fanout[self.signal("PENABLE", node, "gi")] = self.signal("PENABLE")
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fanout[self.signal("PWRITE", node, "gi")] = (
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f"cpuif_wr_sel.{get_indexed_path(self.exp.ds.top_node, node, 'gi')}"
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)
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fanout[self.signal("PADDR", node, "gi")] = f"{{{'-'.join(addr_comp)}}}[{clog2(node.size) - 1}:0]"
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fanout[self.signal("PPROT", node, "gi")] = self.signal("PPROT")
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fanout[self.signal("PWDATA", node, "gi")] = "cpuif_wr_data"
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fanout[self.signal("PSTRB", node, "gi")] = "cpuif_wr_byte_en"
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return "\n".join(f"assign {kv[0]} = {kv[1]};" for kv in fanout.items())
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def fanin_wr(self, node: AddressableNode | None = None, *, error: bool = False) -> str:
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fanin: dict[str, str] = {}
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if node is None:
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fanin["cpuif_wr_ack"] = "'0"
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fanin["cpuif_wr_err"] = "'0"
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if error:
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fanin["cpuif_wr_ack"] = "'1"
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fanin["cpuif_wr_err"] = "cpuif_wr_sel.cpuif_err"
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else:
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fanin["cpuif_wr_ack"] = self.signal("PREADY", node, "i")
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fanin["cpuif_wr_err"] = self.signal("PSLVERR", node, "i")
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return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
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def fanin_rd(self, node: AddressableNode | None = None, *, error: bool = False) -> str:
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fanin: dict[str, str] = {}
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if node is None:
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fanin["cpuif_rd_ack"] = "'0"
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fanin["cpuif_rd_err"] = "'0"
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fanin["cpuif_rd_data"] = "'0"
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if error:
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fanin["cpuif_rd_ack"] = "'1"
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fanin["cpuif_rd_err"] = "cpuif_rd_sel.cpuif_err"
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else:
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fanin["cpuif_rd_ack"] = self.signal("PREADY", node, "i")
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fanin["cpuif_rd_err"] = self.signal("PSLVERR", node, "i")
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fanin["cpuif_rd_data"] = self.signal("PRDATA", node, "i")
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return "\n".join(f"{kv[0]} = {kv[1]};" for kv in fanin.items())
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