Add support for user defined enums in field encode property. #29

2022-08-14 18:13:41 +01:00
parent 80f670bf30
commit 0c7e493976
9 changed files with 104 additions and 5 deletions
--- a/docs/props/field.rst
+++ b/docs/props/field.rst
@@ -448,7 +448,10 @@ Misc

 encode
 ^^^^^^
-|NO|
+If assigned a user-defined enumeration, the resulting package file will include
+its definition. Due to limitations from type-strictness rules in SystemVerilog,
+the field will remain as a ``logic`` datatype.
+

 next
 ^^^^