Add support for field paritycheck. #35

This commit is contained in:
Alex Mykyta
2023-05-15 22:53:17 -07:00
parent 3e691cb5fb
commit 0d82154b9d
16 changed files with 183 additions and 3 deletions

View File

View File

@@ -0,0 +1,14 @@
addrmap top {
default paritycheck;
default sw=rw;
default hw=na;
reg my_reg {
field {} f1[16] = 0;
field {} f2[8] = 0;
field {} f3 = 0;
};
my_reg r1 @ 0x000;
my_reg r2[8] @ 0x1000;
};

View File

@@ -0,0 +1,37 @@
{% extends "lib/tb_base.sv" %}
{% block seq %}
{% sv_line_anchor %}
##1;
cb.rst <= '0;
##1;
fork
begin
repeat(50) begin
automatic int i = $urandom_range(7,0);
cpuif.write('h0, $urandom());
cpuif.write('h1000 + i*4, $urandom());
end
end
begin
forever begin
assert(cb.parity_error != 1'b1);
@cb;
end
end
join_any
disable fork;
cpuif.write('h0, 'd0);
force dut.field_storage.r1.f1.value[3] = 1'b1;
release dut.field_storage.r1.f1.value[3];
@cb;
@cb;
assert(cb.parity_error == 1'b1);
cpuif.write('h0, 'd0);
@cb;
@cb;
assert(cb.parity_error == 1'b0);
{% endblock %}

View File

@@ -0,0 +1,5 @@
from ..lib.sim_testcase import SimTestCase
class Test(SimTestCase):
def test_dut(self):
self.run_test()