Fixup docs

docs/udps/intro.rst

@@ -24,25 +24,25 @@ To enable these UDPs, compile this RDL file prior to the rest of your design:
         - boolean
         - If set, reads from the register are double-buffered.
 
-          See details here: :ref:`read_buffering`.
+          See: :ref:`read_buffering`.
 
     *   - rbuffer_trigger
         - reg
         - reference
         - Defines the buffered read load trigger.
 
-          See details here: :ref:`read_buffering`.
+          See: :ref:`read_buffering`.
 
     *   - buffer_writes
         - reg
         - boolean
         - If set, writes to the register are double-buffered.
 
-          See details here: :ref:`write_buffering`.
+          See: :ref:`write_buffering`.
 
     *   - wbuffer_trigger
         - reg
         - reference
         - Defines the buffered write commit trigger.
 
-          See details here: :ref:`write_buffering`.
+          See: :ref:`write_buffering`.

docs/udps/read_buffering.rst

@@ -27,6 +27,10 @@ properties:
 .. literalinclude:: ../../hdl-src/regblock_udps.rdl
     :lines: 10-18
 
+These UDP definitions, along with others supported by PeakRDL-regblock can be
+enabled by compiling the following file along with your design:
+:download:`regblock_udps.rdl <../../hdl-src/regblock_udps.rdl>`.
+
 ``buffer_reads``
     *   Assigned value is a boolean.
     *   If true, enables double-buffering of software reads of this register.

docs/udps/write_buffering.rst

@@ -33,6 +33,10 @@ properties:
 .. literalinclude:: ../../hdl-src/regblock_udps.rdl
     :lines: 20-28
 
+These UDP definitions, along with others supported by PeakRDL-regblock can be
+enabled by compiling the following file along with your design:
+:download:`regblock_udps.rdl <../../hdl-src/regblock_udps.rdl>`.
+
 ``buffer_writes``
     *   Assigned value is a boolean.
     *   If true, enables double-buffering of writes to this register.
@@ -84,7 +88,6 @@ write-buffered.
 
 Wide Atomic Register
 ^^^^^^^^^^^^^^^^^^^^
-
 Without write-buffering, it is impossible to update the state of a 64-bit
 register using a 32-bit CPU interface in a single clock-cycle.
 In this example, it still requires two write-cycles to update the register, but
@@ -108,7 +111,6 @@ same clock cycle. The register is updated atomically.
 
 Atomic Group of Registers
 ^^^^^^^^^^^^^^^^^^^^^^^^^
-
 Perhaps you have a group of registers that need their state to be updated
 atomically. Using the ``wbuffer_trigger`` property, you can define which
 register write operation triggers the group to be updated.

src/peakrdl_regblock/validate_design.py

@@ -90,7 +90,8 @@ class DesignValidator(RDLListener):
                 self.msg.error(
                     f"Software-writable field '{node.inst_name}' shall not span"
                     " multiple software-accessible subwords. Consider enabling"
-                    " write double-buffering.",
+                    " write double-buffering.\n"
+                    "For more details, see: https://peakrdl-regblock.readthedocs.io/en/latest/udps/write_buffering.html",
                     node.inst.inst_src_ref
                 )
 
@@ -101,6 +102,7 @@ class DesignValidator(RDLListener):
                     f"The field '{node.inst_name}' spans multiple software-accessible"
                     " subwords and is modified on-read, making it impossible to"
                     " access its value correctly. Consider enabling read"
-                    " double-buffering.",
+                    " double-buffering. \n"
+                    "For more details, see: https://peakrdl-regblock.readthedocs.io/en/latest/udps/read_buffering.html",
                     node.inst.inst_src_ref
                 )