From 18f8f358b27bcd1ae6d1b6cc9bc9084a848274b6 Mon Sep 17 00:00:00 2001 From: Alex Mykyta Date: Tue, 18 Jul 2023 21:50:51 -0700 Subject: [PATCH] Make stickybit conditional predicate a single-bit result rather than a vector. #54 --- src/peakrdl_regblock/field_logic/hw_interrupts.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/peakrdl_regblock/field_logic/hw_interrupts.py b/src/peakrdl_regblock/field_logic/hw_interrupts.py index 16b411e..5a5e245 100644 --- a/src/peakrdl_regblock/field_logic/hw_interrupts.py +++ b/src/peakrdl_regblock/field_logic/hw_interrupts.py @@ -121,7 +121,7 @@ class BothedgeStickybit(NextStateConditional): def get_predicate(self, field: 'FieldNode') -> str: I = self.exp.hwif.get_input_identifier(field) Iq = self.exp.field_logic.get_next_q_identifier(field) - return f"{Iq} ^ {I}" + return f"{Iq} != {I}" def get_assignments(self, field: 'FieldNode') -> List[str]: I = self.exp.hwif.get_input_identifier(field)