From 19edc135e32dce9308a4368d68108174f4e37c37 Mon Sep 17 00:00:00 2001
From: Alex Mykyta <amykyta3@users.noreply.github.com>
Date: Sun, 20 Mar 2022 23:00:31 -0700
Subject: [PATCH] sentences are hard

---
 docs/index.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/index.rst b/docs/index.rst
index 67f86c0..0b7b18b 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -2,7 +2,7 @@ Introduction
 ============
 
 PeakRDL-regblock is a free and open-source control & status register (CSR) compiler.
-This code generator that will translate your SystemRDL register description into
+This code generator translates your SystemRDL register description into
 a synthesizable SystemVerilog RTL module that can be easily instantiated into
 your hardware design.