simplify cpuif base cls

src/peakrdl_regblock/cpuif/base.py

@@ -1,4 +1,4 @@
-from typing import TYPE_CHECKING, Optional
+from typing import TYPE_CHECKING
 import inspect
 import os
 
@@ -8,16 +8,15 @@ from ..utils import get_always_ff_event, clog2, is_pow2, roundup_pow2
 
 if TYPE_CHECKING:
     from ..exporter import RegblockExporter
-    from systemrdl import SignalNode
 
 class CpuifBase:
 
     # Path is relative to the location of the class that assigns this variable
     template_path = ""
 
-    def __init__(self, exp:'RegblockExporter', cpuif_reset:Optional['SignalNode'], data_width:int=32, addr_width:int=32):
+    def __init__(self, exp:'RegblockExporter', data_width:int=32, addr_width:int=32):
         self.exp = exp
-        self.reset = cpuif_reset
+        self.reset = exp.top_node.cpuif_reset
         self.data_width = data_width
         self.addr_width = addr_width
 

src/peakrdl_regblock/exporter.py

@@ -153,7 +153,6 @@ class RegblockExporter:
         # Construct exporter components
         self.cpuif = cpuif_cls(
             self,
-            cpuif_reset=self.top_node.cpuif_reset,
             data_width=scanner.cpuif_data_width,
             addr_width=addr_width
         )