Add passthrough CPUIF

2022-01-27 22:04:17 -08:00
parent ae9d555ef4
commit 321d8a6cd1
12 changed files with 161 additions and 14 deletions
--- a/peakrdl/regblock/cpuif/base.py
+++ b/peakrdl/regblock/cpuif/base.py
@@ -7,7 +7,7 @@ if TYPE_CHECKING:
    from systemrdl import SignalNode

 class CpuifBase:
-    template_path = "cpuif/base_tmpl.sv"
+    template_path = ""

    def __init__(self, exp:'RegblockExporter', cpuif_reset:Optional['SignalNode'], data_width:int=32, addr_width:int=32):
        self.exp = exp