More testcases & documentation

doc/architecture.rst

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+Register Block Architecture
+===========================
+
+TODO: Add full block diagram
+
+
+CPU Interface
+-------------
+
+TODO: describe boundary signals. Timing diagrams
+
+Address Decode
+--------------
+
+TODO: describe boundary signals. Timing diagrams
+
+Field Logic
+-----------
+
+TODO: describe boundary signals. Timing diagrams
+
+Readback
+--------
+
+TODO: describe boundary signals. Timing diagrams
+Retiming options