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Simplify stickybit implementation for single-bit fields to not create redundant expression. #127

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Alex Mykyta
2025-03-07 19:39:57 -08:00
parent 6430dd4914
commit 3ed2e1f891
1 changed files with 55 additions and 28 deletions
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83
src/peakrdl_regblock/field_logic/hw_interrupts.py
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@@ -46,15 +46,24 @@ class Stickybit(NextStateConditional):
def get_predicate(self, field: 'FieldNode') -> str: def get_predicate(self, field: 'FieldNode') -> str:
F = self.exp.hwif.get_input_identifier(field) F = self.exp.hwif.get_input_identifier(field)
return f"{F} != '0" if field.width == 1:
return str(F)
else:
return f"{F} != '0"
def get_assignments(self, field: 'FieldNode') -> List[str]: def get_assignments(self, field: 'FieldNode') -> List[str]:
I = self.exp.hwif.get_input_identifier(field) if field.width == 1:
R = self.exp.field_logic.get_storage_identifier(field) return [
return [ "next_c = '1;",
f"next_c = {R} | {I};", "load_next_c = '1;",
"load_next_c = '1;", ]
] else:
I = self.exp.hwif.get_input_identifier(field)
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | {I};",
"load_next_c = '1;",
]
class PosedgeStickybit(NextStateConditional): class PosedgeStickybit(NextStateConditional):
""" """
@@ -74,13 +83,19 @@ class PosedgeStickybit(NextStateConditional):
return f"(~{Iq} & {I}) != '0" return f"(~{Iq} & {I}) != '0"
def get_assignments(self, field: 'FieldNode') -> List[str]: def get_assignments(self, field: 'FieldNode') -> List[str]:
I = self.exp.hwif.get_input_identifier(field) if field.width == 1:
Iq = self.exp.field_logic.get_next_q_identifier(field) return [
R = self.exp.field_logic.get_storage_identifier(field) "next_c = '1;",
return [ "load_next_c = '1;",
f"next_c = {R} | (~{Iq} & {I});", ]
"load_next_c = '1;", else:
] I = self.exp.hwif.get_input_identifier(field)
Iq = self.exp.field_logic.get_next_q_identifier(field)
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | (~{Iq} & {I});",
"load_next_c = '1;",
]
class NegedgeStickybit(NextStateConditional): class NegedgeStickybit(NextStateConditional):
""" """
@@ -100,13 +115,19 @@ class NegedgeStickybit(NextStateConditional):
return f"({Iq} & ~{I}) != '0" return f"({Iq} & ~{I}) != '0"
def get_assignments(self, field: 'FieldNode') -> List[str]: def get_assignments(self, field: 'FieldNode') -> List[str]:
I = self.exp.hwif.get_input_identifier(field) if field.width == 1:
Iq = self.exp.field_logic.get_next_q_identifier(field) return [
R = self.exp.field_logic.get_storage_identifier(field) "next_c = '1;",
return [ "load_next_c = '1;",
f"next_c = {R} | ({Iq} & ~{I});", ]
"load_next_c = '1;", else:
] I = self.exp.hwif.get_input_identifier(field)
Iq = self.exp.field_logic.get_next_q_identifier(field)
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | ({Iq} & ~{I});",
"load_next_c = '1;",
]
class BothedgeStickybit(NextStateConditional): class BothedgeStickybit(NextStateConditional):
""" """
@@ -126,13 +147,19 @@ class BothedgeStickybit(NextStateConditional):
return f"{Iq} != {I}" return f"{Iq} != {I}"
def get_assignments(self, field: 'FieldNode') -> List[str]: def get_assignments(self, field: 'FieldNode') -> List[str]:
I = self.exp.hwif.get_input_identifier(field) if field.width == 1:
Iq = self.exp.field_logic.get_next_q_identifier(field) return [
R = self.exp.field_logic.get_storage_identifier(field) "next_c = '1;",
return [ "load_next_c = '1;",
f"next_c = {R} | ({Iq} ^ {I});", ]
"load_next_c = '1;", else:
] I = self.exp.hwif.get_input_identifier(field)
Iq = self.exp.field_logic.get_next_q_identifier(field)
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | ({Iq} ^ {I});",
"load_next_c = '1;",
]
class PosedgeNonsticky(NextStateUnconditional): class PosedgeNonsticky(NextStateUnconditional):
""" """