Add 'rd_swacc' and 'wr_swacc' UDPs. #21

2022-11-09 21:22:59 -08:00
parent 17afaf13ff
commit 489b4d1310
17 changed files with 243 additions and 12 deletions
--- a/src/peakrdl_regblock/hwif/generators.py
+++ b/src/peakrdl_regblock/hwif/generators.py
@@ -128,7 +128,7 @@ class OutputStructGenerator_Hier(HWIFStructGenerator):
            self.add_member("value", node.width)

        # Generate output bit signals enabled via property
-        for prop_name in ["anded", "ored", "xored", "swmod", "swacc", "overflow", "underflow"]:
+        for prop_name in ["anded", "ored", "xored", "swmod", "swacc", "overflow", "underflow", "rd_swacc", "wr_swacc"]:
            if node.get_property(prop_name):
                self.add_member(prop_name)