Reorganize test dir to ensure test of installed pkg
This commit is contained in:
Alex Mykyta
193
tests/lib/cpuifs/axi4lite/axi4lite_intf_driver.sv
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193
tests/lib/cpuifs/axi4lite/axi4lite_intf_driver.sv
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interface axi4lite_intf_driver #(
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parameter DATA_WIDTH = 32,
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parameter ADDR_WIDTH = 32
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)(
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input wire clk,
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input wire rst,
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axi4lite_intf.master m_axil
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);
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timeunit 1ps;
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timeprecision 1ps;
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logic AWREADY;
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logic AWVALID;
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logic [ADDR_WIDTH-1:0] AWADDR;
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logic [2:0] AWPROT;
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logic WREADY;
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logic WVALID;
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logic [DATA_WIDTH-1:0] WDATA;
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logic [DATA_WIDTH/8-1:0] WSTRB;
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logic BREADY;
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logic BVALID;
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logic [1:0] BRESP;
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logic ARREADY;
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logic ARVALID;
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logic [ADDR_WIDTH-1:0] ARADDR;
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logic [2:0] ARPROT;
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logic RREADY;
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logic RVALID;
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logic [DATA_WIDTH-1:0] RDATA;
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logic [1:0] RRESP;
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assign AWREADY = m_axil.AWREADY;
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assign m_axil.AWVALID = AWVALID;
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assign m_axil.AWADDR = AWADDR;
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assign m_axil.AWPROT = AWPROT;
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assign WREADY = m_axil.WREADY;
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assign m_axil.WVALID = WVALID;
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assign m_axil.WDATA = WDATA;
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assign m_axil.WSTRB = WSTRB;
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assign m_axil.BREADY = BREADY;
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assign BVALID = m_axil.BVALID;
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assign BRESP = m_axil.BRESP;
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assign ARREADY = m_axil.ARREADY;
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assign m_axil.ARVALID = ARVALID;
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assign m_axil.ARADDR = ARADDR;
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assign m_axil.ARPROT = ARPROT;
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assign m_axil.RREADY = RREADY;
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assign RVALID = m_axil.RVALID;
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assign RDATA = m_axil.RDATA;
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assign RRESP = m_axil.RRESP;
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default clocking cb @(posedge clk);
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default input #1step output #1;
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input AWREADY;
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output AWVALID;
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output AWADDR;
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output AWPROT;
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input WREADY;
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output WVALID;
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output WDATA;
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output WSTRB;
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inout BREADY;
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input BVALID;
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input BRESP;
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input ARREADY;
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output ARVALID;
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output ARADDR;
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output ARPROT;
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inout RREADY;
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input RVALID;
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input RDATA;
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input RRESP;
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endclocking
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task automatic reset();
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cb.AWVALID <= '0;
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cb.AWADDR <= '0;
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cb.AWPROT <= '0;
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cb.WVALID <= '0;
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cb.WDATA <= '0;
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cb.WSTRB <= '0;
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cb.ARVALID <= '0;
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cb.ARADDR <= '0;
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cb.ARPROT <= '0;
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endtask
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initial forever begin
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cb.RREADY <= $urandom_range(1, 0);
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cb.BREADY <= $urandom_range(1, 0);
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@cb;
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end
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semaphore txn_aw_mutex = new(1);
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semaphore txn_w_mutex = new(1);
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semaphore txn_b_mutex = new(1);
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semaphore txn_ar_mutex = new(1);
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semaphore txn_r_mutex = new(1);
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task automatic write(logic [ADDR_WIDTH-1:0] addr, logic [DATA_WIDTH-1:0] data);
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bit w_before_aw;
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w_before_aw = $urandom_range(1,0);
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fork
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begin
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txn_aw_mutex.get();
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##0;
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if(w_before_aw) repeat($urandom_range(2,0)) @cb;
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cb.AWVALID <= '1;
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cb.AWADDR <= addr;
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cb.AWPROT <= '0;
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@(cb);
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while(cb.AWREADY !== 1'b1) @(cb);
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cb.AWVALID <= '0;
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txn_aw_mutex.put();
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end
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begin
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txn_w_mutex.get();
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##0;
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if(!w_before_aw) repeat($urandom_range(2,0)) @cb;
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cb.WVALID <= '1;
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cb.WDATA <= data;
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cb.WSTRB <= '1; // TODO: Support byte strobes
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@(cb);
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while(cb.WREADY !== 1'b1) @(cb);
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cb.WVALID <= '0;
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cb.WSTRB <= '0;
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txn_w_mutex.put();
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end
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begin
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txn_b_mutex.get();
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@cb;
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while(!(cb.BREADY === 1'b1 && cb.BVALID === 1'b1)) @(cb);
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assert(!$isunknown(cb.BRESP)) else $error("Read from 0x%0x returned X's on BRESP", addr);
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txn_b_mutex.put();
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end
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join
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endtask
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task automatic read(logic [ADDR_WIDTH-1:0] addr, output logic [DATA_WIDTH-1:0] data);
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fork
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begin
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txn_ar_mutex.get();
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##0;
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cb.ARVALID <= '1;
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cb.ARADDR <= addr;
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cb.ARPROT <= '0;
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@(cb);
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while(cb.ARREADY !== 1'b1) @(cb);
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cb.ARVALID <= '0;
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txn_ar_mutex.put();
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end
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begin
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txn_r_mutex.get();
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@cb;
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while(!(cb.RREADY === 1'b1 && cb.RVALID === 1'b1)) @(cb);
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assert(!$isunknown(cb.RDATA)) else $error("Read from 0x%0x returned X's on RDATA", addr);
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assert(!$isunknown(cb.RRESP)) else $error("Read from 0x%0x returned X's on RRESP", addr);
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data = cb.RDATA;
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txn_r_mutex.put();
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end
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join
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endtask
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task automatic assert_read(logic [ADDR_WIDTH-1:0] addr, logic [DATA_WIDTH-1:0] expected_data, logic [DATA_WIDTH-1:0] mask = '1);
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logic [DATA_WIDTH-1:0] data;
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read(addr, data);
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data &= mask;
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assert(data == expected_data) else $error("Read from 0x%x returned 0x%x. Expected 0x%x", addr, data, expected_data);
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endtask
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initial begin
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reset();
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end
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initial forever begin
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@cb;
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if(!rst) assert(!$isunknown(cb.AWREADY)) else $error("Saw X on AWREADY!");
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if(!rst) assert(!$isunknown(cb.WREADY)) else $error("Saw X on WREADY!");
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if(!rst) assert(!$isunknown(cb.BVALID)) else $error("Saw X on BVALID!");
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if(!rst) assert(!$isunknown(cb.ARREADY)) else $error("Saw X on ARREADY!");
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if(!rst) assert(!$isunknown(cb.RVALID)) else $error("Saw X on RVALID!");
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end
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endinterface
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