diff --git a/src/peakrdl_regblock/dereferencer.py b/src/peakrdl_regblock/dereferencer.py
index 47dc7c8..7a10482 100644
--- a/src/peakrdl_regblock/dereferencer.py
+++ b/src/peakrdl_regblock/dereferencer.py
@@ -169,10 +169,6 @@ class Dereferencer:
             return self.field_logic.get_swacc_identifier(field)
         if prop_name == "swmod":
             return self.field_logic.get_swmod_identifier(field)
-        if prop_name == "rd_swacc":
-            return self.field_logic.get_rd_swacc_identifier(field)
-        if prop_name == "wr_swacc":
-            return self.field_logic.get_wr_swacc_identifier(field)
 
 
         # translate aliases
diff --git a/tests/test_buffered_swacc_swmod/regblock.rdl b/tests/test_buffered_swacc_swmod/regblock.rdl
index 4b0d82f..f4105ec 100644
--- a/tests/test_buffered_swacc_swmod/regblock.rdl
+++ b/tests/test_buffered_swacc_swmod/regblock.rdl
@@ -28,4 +28,33 @@ addrmap top {
             rclr;
         } f[16] = 0x1030;
     } r3;
+
+    reg {
+        buffer_reads;
+        buffer_writes;
+        field {
+            sw=rw; hw=r;
+            swacc;
+            swmod;
+        } f[16] = 0x1234;
+    } r4;
+
+    reg {
+        buffer_writes;
+        field {
+            sw=rw; hw=r;
+            swacc;
+            swmod;
+        } f[16] = 0xABCD;
+    } r5;
+
+    reg {
+        buffer_reads;
+        field {
+            sw=r; hw=rw;
+            we;
+            swmod;
+            rclr;
+        } f[16] = 0x1030;
+    } r6;
 };
diff --git a/tests/test_buffered_swacc_swmod/tb_template.sv b/tests/test_buffered_swacc_swmod/tb_template.sv
index 897b788..019c669 100644
--- a/tests/test_buffered_swacc_swmod/tb_template.sv
+++ b/tests/test_buffered_swacc_swmod/tb_template.sv
@@ -7,6 +7,7 @@
     logic [7:0] rd_data_h;
     logic [15:0] latched_data;
     int event_count;
+    bit fired;
     latched_data = 'x;
 
     ##1;
@@ -35,7 +36,7 @@
         begin
             cpuif.read('h0, rd_data_l);
             cpuif.read('h1, rd_data_h);
-            @cb;
+            repeat(3) @cb;
         end
     join_any
     disable fork;
@@ -44,6 +45,7 @@
 
 
     // Verify that hwif changes 1 cycle after swmod
+    fired = 0;
     fork
         begin
             ##0;
@@ -52,6 +54,7 @@
                 if(cb.hwif_out.r2.f.swmod) break;
                 @cb;
             end
+            fired = 1;
             @cb;
             forever begin
                 assert(cb.hwif_out.r2.f.value == 'h4221);
@@ -63,12 +66,14 @@
         begin
             cpuif.write('h2, 'h21);
             cpuif.write('h3, 'h42);
-            @cb;
+            repeat(3) @cb;
         end
     join_any
     disable fork;
+    assert(fired);
 
     // Verify that hwif changes 1 cycle after swmod
+    fired = 0;
     fork
         begin
             ##0;
@@ -77,6 +82,7 @@
                 if(cb.hwif_out.r3.f.swmod) break;
                 @cb;
             end
+            fired = 1;
             @cb;
             forever begin
                 assert(cb.hwif_out.r3.f.value == 0);
@@ -88,9 +94,104 @@
         begin
             cpuif.assert_read('h4, 'h30);
             cpuif.assert_read('h5, 'h10);
-            @cb;
+            repeat(3) @cb;
         end
     join_any
     disable fork;
+    assert(fired);
+
+    // Verify swacc and swmod assert when written
+    fired = 0;
+    fork
+        begin
+            ##0;
+            forever begin
+                assert(cb.hwif_out.r4.f.value == 'h1234);
+                if(cb.hwif_out.r4.f.swmod || cb.hwif_out.r4.f.swacc) begin
+                    assert(cb.hwif_out.r4.f.swmod == 1);
+                    assert(cb.hwif_out.r4.f.swacc == 1);
+                    break;
+                end
+                @cb;
+            end
+            fired = 1;
+            @cb;
+            forever begin
+                assert(cb.hwif_out.r4.f.value == 'h4567);
+                assert(cb.hwif_out.r4.f.swmod == 0);
+                assert(cb.hwif_out.r4.f.swacc == 0);
+                @cb;
+            end
+        end
+
+        begin
+            cpuif.write('h6, 'h67);
+            cpuif.write('h7, 'h45);
+            repeat(3) @cb;
+        end
+    join_any
+    disable fork;
+    assert(fired);
+
+    // Verify swacc and swmod assert when written
+    fired = 0;
+    fork
+        begin
+            ##0;
+            forever begin
+                assert(cb.hwif_out.r5.f.value == 'hABCD);
+                if(cb.hwif_out.r5.f.swmod || cb.hwif_out.r5.f.swacc) begin
+                    assert(cb.hwif_out.r5.f.swmod == 1);
+                    assert(cb.hwif_out.r5.f.swacc == 1);
+                    break;
+                end
+                @cb;
+            end
+            fired = 1;
+            @cb;
+            forever begin
+                assert(cb.hwif_out.r5.f.value == 'hEF12);
+                assert(cb.hwif_out.r5.f.swmod == 0);
+                assert(cb.hwif_out.r5.f.swacc == 0);
+                @cb;
+            end
+        end
+
+        begin
+            cpuif.write('h8, 'h12);
+            cpuif.write('h9, 'hEF);
+            repeat(3) @cb;
+        end
+    join_any
+    disable fork;
+    assert(fired);
+
+    // Verify that hwif changes 1 cycle after swmod
+    fired = 0;
+    fork
+        begin
+            ##0;
+            forever begin
+                assert(cb.hwif_out.r6.f.value == 'h1030);
+                if(cb.hwif_out.r6.f.swmod) break;
+                @cb;
+            end
+            fired = 1;
+            @cb;
+            forever begin
+                assert(cb.hwif_out.r6.f.value == 0);
+                assert(cb.hwif_out.r6.f.swmod == 0);
+                @cb;
+            end
+        end
+
+        begin
+            cpuif.assert_read('ha, 'h30);
+            cpuif.assert_read('hb, 'h10);
+            repeat(3) @cb;
+        end
+    join_any
+    disable fork;
+    assert(fired);
 
 {% endblock %}
diff --git a/tests/test_swacc_swmod/regblock.rdl b/tests/test_swacc_swmod/regblock.rdl
index 73d9324..877098b 100644
--- a/tests/test_swacc_swmod/regblock.rdl
+++ b/tests/test_swacc_swmod/regblock.rdl
@@ -5,6 +5,7 @@ addrmap top {
         field {
             sw=r; hw=w;
             swacc;
+            swmod;
         } f[8];
     } r1;
 
@@ -22,4 +23,21 @@ addrmap top {
             rclr;
         } f[8] = 30;
     } r3;
+
+    reg {
+        field {
+            sw=rw; hw=r;
+            swacc;
+            swmod;
+        } f[8] = 0x12;
+    } r4;
+
+    reg {
+        field {
+            sw=r; hw=rw;
+            we;
+            swmod;
+            rclr;
+        } f[8] = 30;
+    } r5;
 };
diff --git a/tests/test_swacc_swmod/tb_template.sv b/tests/test_swacc_swmod/tb_template.sv
index d7801c6..7f9c78b 100644
--- a/tests/test_swacc_swmod/tb_template.sv
+++ b/tests/test_swacc_swmod/tb_template.sv
@@ -6,6 +6,7 @@
     logic [7:0] rd_data;
     logic [7:0] latched_data;
     int event_count;
+    bit fired;
     latched_data = 'x;
 
     ##1;
@@ -33,15 +34,35 @@
 
         begin
             cpuif.read('h0, rd_data);
-            @cb;
+            repeat(4) @cb;
         end
     join_any
     disable fork;
     assert(rd_data == latched_data) else $error("Read returned 0x%0x but swacc strobed during 0x%0x", rd_data, latched_data);
     assert(event_count == 1) else $error("Observed excess swacc events: %0d", event_count);
 
+    // Verify that writing a read-only register with no side effects never asserts swmod
+    cb.hwif_in.r1.f.next <= 'h99;
+    @cb;
+    fork
+        begin
+            ##0;
+            forever begin
+                assert(cb.hwif_out.r1.f.swmod == 0);
+                @cb;
+            end
+        end
+        begin
+            cpuif.write('h0, 'h0);
+            cpuif.assert_read('h0, 'h99);
+            repeat(4) @cb;
+        end
+    join_any
+    disable fork;
+
 
     // Verify that hwif changes 1 cycle after swmod
+    fired = 0;
     fork
         begin
             ##0;
@@ -50,6 +71,7 @@
                 if(cb.hwif_out.r2.f.swmod) break;
                 @cb;
             end
+            fired = 1;
             @cb;
             forever begin
                 assert(cb.hwif_out.r2.f.value == 21);
@@ -60,12 +82,14 @@
 
         begin
             cpuif.write('h1, 21);
-            @cb;
+            repeat(4) @cb;
         end
     join_any
     disable fork;
+    assert(fired);
 
     // Verify that hwif changes 1 cycle after swmod
+    fired = 0;
     fork
         begin
             ##0;
@@ -74,6 +98,7 @@
                 if(cb.hwif_out.r3.f.swmod) break;
                 @cb;
             end
+            fired = 1;
             @cb;
             forever begin
                 assert(cb.hwif_out.r3.f.value == 0);
@@ -84,9 +109,69 @@
 
         begin
             cpuif.assert_read('h2, 30);
-            @cb;
+            repeat(4) @cb;
         end
     join_any
     disable fork;
+    assert(fired);
+
+    // Verify swacc and swmod assert when written
+    fired = 0;
+    fork
+        begin
+            ##0;
+            forever begin
+                assert(cb.hwif_out.r4.f.value == 'h12);
+                if(cb.hwif_out.r4.f.swmod || cb.hwif_out.r4.f.swacc) begin
+                    assert(cb.hwif_out.r4.f.swmod == 1);
+                    assert(cb.hwif_out.r4.f.swacc == 1);
+                    break;
+                end
+                @cb;
+            end
+            fired = 1;
+            @cb;
+            forever begin
+                assert(cb.hwif_out.r4.f.value == 'h34);
+                assert(cb.hwif_out.r4.f.swmod == 0);
+                @cb;
+            end
+        end
+
+        begin
+            cpuif.write('h3, 'h34);
+            repeat(4) @cb;
+        end
+    join_any
+    disable fork;
+    assert(fired);
+
+
+    // Verify that hwif changes 1 cycle after swmod
+    fired = 0;
+    fork
+        begin
+            ##0;
+            forever begin
+                assert(cb.hwif_out.r5.f.value == 30);
+                if(cb.hwif_out.r5.f.swmod) break;
+                @cb;
+            end
+            fired = 1;
+            @cb;
+            forever begin
+                assert(cb.hwif_out.r5.f.value == 0);
+                assert(cb.hwif_out.r5.f.swmod == 0);
+                @cb;
+            end
+        end
+
+        begin
+            cpuif.assert_read('h4, 30);
+            repeat(4) @cb;
+        end
+    join_any
+    disable fork;
+    assert(fired);
 
 {% endblock %}