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Add interrupt tests!

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This commit is contained in:
Alex Mykyta
2022-01-25 21:24:17 -08:00
parent ae3714f4a4
commit 603484788a
12 changed files with 471 additions and 52 deletions
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22
docs/dev_notes/Validation Needed
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@@ -105,12 +105,13 @@ X sticky=true + "(posedge|negedge|bothedge) intr"
X we/wel + implied or explicit "sticky"/"stickybit"
we/wel modifier doesn't make sense here.
! hwclr/hwset/we/wel probably shouldn't be able to reference itself
y->hwclr = y;
y->we = y;
... it works, but should it be allowed? Seems like user-error
X sticky/stickybit shall be hw writable
! counter field that saturates should not set overflow
X Illegal to use enable/mask/haltenable/haltmask on non-intr fields
X incrwidth/decrwidth must be between 1 and the width of the counter
X counter field that saturates should not set overflow
counter; incrsaturate; overflow;
counter; decrsaturate; underflow;
@@ -119,11 +120,10 @@ X we/wel + implied or explicit "sticky"/"stickybit"
Same goes to prop references to overflow/underflow
! incrwidth/decrwidth must be between 1 and the width of the counter
! Illegal to use enable/mask/haltenable/haltmask on non-intr fields
! sticky/stickybit shall be hw writable
! hwclr/hwset/we/wel probably shouldn't be able to reference itself
y->hwclr = y;
y->we = y;
... it works, but should it be allowed? Seems like user-error
================================================================================
Things that need validation by this exporter
@@ -148,7 +148,7 @@ X Warn/error on any signal with cpuif_reset set, that is not in the top-level
! async data signals
Only supporting async signals if they are exclusively used in resets.
Anyhting else declared as "async" shall emit a warning that it is ignored
Anything else declared as "async" shall emit a warning that it is ignored
I have zero interest in implementing resynchronizers
! Error if a property references a non-signal component, or property reference from

12
docs/dev_notes/template-layers/4-fields
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@@ -53,7 +53,7 @@ TODO:
Provide a mechanism for users to extend/override field behavior
TODO:
Does the endinness the user sets matter anywhere?
Does the endianness the user sets matter anywhere?
Implementation
Makes sense to use a listener class
@@ -63,7 +63,7 @@ Be sure to skip alias registers
--------------------------------------------------------------------------------
NextStateConditional Class
Decribes a single conditional action that determines the next state of a field
Describes a single conditional action that determines the next state of a field
Provides information to generate the following content:
if(<conditional>) begin
<assignments>
@@ -110,22 +110,22 @@ FieldBuilder Class
NextStateConditional objects are stored in a dictionary as follows:
_conditionals {
assignment_precedence: [
conditional_option_3,
conditional_option_2,
conditional_option_1,
conditional_option_2,
conditional_option_3,
]
}
add_conditional(self, conditional, assignment_precedence):
Inserts the NextStateConditional into the given assignment precedence bin
The last one added to a precedence bin is first in that bin's search order
The first one added to a precedence bin is first in that bin's search order
init_conditionals(self) -> None:
Called from __init__.
loads all possible conditionals into self.conditionals list
This function is to provide a hook for the user to add their own.
Do not do fancy class intospection. Load them explicitly by name like so:
Do not do fancy class introspection. Load them explicitly by name like so:
self.add_conditional(MyNextState(), AssignmentPrecedence.SW_ACCESS)
If user wants to extend this class, they can pile onto the bins of conditionals freely!