Implement new SVInt object to defer literal expansion and allow bit-fiddling operations. Fix invalid bit-slicing of literals if field reset value is a constant. #71

2023-10-24 22:50:41 -07:00
parent b5b1ba790e
commit 62518b318b
14 changed files with 147 additions and 62 deletions
--- a/tests/test_wide_regs/tb_template.sv
+++ b/tests/test_wide_regs/tb_template.sv
@@ -108,4 +108,14 @@
    // counter_reg
    cpuif.assert_read('h30, 16'h0204);

+    // r_reg3
+    cpuif.assert_read('h34, 16'h5678);
+    cpuif.assert_read('h36, 16'h1234);
+    assert(cb.hwif_out.r_reg3.f1.value == 32'h12345678);
+
+    // r_reg4
+    cpuif.assert_read('h38, 16'h2C48);
+    cpuif.assert_read('h3A, 16'h1E6A);
+    assert(cb.hwif_out.r_reg4.f1.value == 32'h12345678);
+
 {% endblock %}