From 62f66fb7ff7771f69ba31a21790ee41e808e6d26 Mon Sep 17 00:00:00 2001 From: Alex Mykyta Date: Fri, 2 May 2025 11:07:10 -0700 Subject: [PATCH] Add xref to VHDL fork --- README.md | 2 +- docs/index.rst | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 4fdb519..8b554c1 100644 --- a/README.md +++ b/README.md @@ -9,4 +9,4 @@ Compile SystemRDL into a SystemVerilog control/status register (CSR) block. For the command line tool, see the [PeakRDL project](https://peakrdl.readthedocs.io). ## Documentation -See the [PeakRDL-regblock Documentation](http://peakrdl-regblock.readthedocs.io) for more details +See the [PeakRDL-regblock Documentation](https://peakrdl-regblock.readthedocs.io) for more details diff --git a/docs/index.rst b/docs/index.rst index d072dbc..f17ceb7 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -25,6 +25,13 @@ The easiest way to use PeakRDL-regblock is via the `PeakRDL command line tool < peakrdl regblock atxmega_spi.rdl -o regblock/ --cpuif axi4-lite +Looking for VHDL? +----------------- +This project generates SystemVerilog RTL. If you prefer using VHDL, check out +the sister project which aims to be a feature-equivalent fork of +PeakRDL-regblock: `PeakRDL-regblock-VHDL `_ + + Links -----