bslathi19/PeakRDL-regblock
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Fix typo in pyproject keywords

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Alex Mykyta
2023-11-07 20:57:49 -08:00
parent 45999555cf
commit 6433cd1fc8
1 changed files with 1 additions and 1 deletions
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pyproject.toml
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@@ -18,7 +18,7 @@ description = "Compile SystemRDL into a SystemVerilog control/status register (C
readme = "README.md" readme = "README.md"
license = {file = "LICENSE"} license = {file = "LICENSE"}
keywords = [ keywords = [
"SystmRDL", "PeakRDL", "CSR", "compiler", "tool", "registers", "generator", "SystemRDL", "PeakRDL", "CSR", "compiler", "tool", "registers", "generator",
"Verilog", "SystemVerilog", "register abstraction layer", "Verilog", "SystemVerilog", "register abstraction layer",
"FPGA", "ASIC", "FPGA", "ASIC",
] ]