bump version

2022-09-23 21:01:11 -07:00
parent 0a6a531c44
commit 6fa5031ada
3 changed files with 11 additions and 1 deletions
--- a/docs/props/field.rst
+++ b/docs/props/field.rst
@@ -559,6 +559,8 @@ integer
 reference
    |OK|

+    Reference to a dynamic reset value.
+
 resetsignal
 ^^^^^^^^^^^
 |OK|
--- a/docs/props/signal.rst
+++ b/docs/props/signal.rst
@@ -9,6 +9,8 @@ activehigh/activelow
 --------------------
 |OK|

+Only relevant for signals used as resets. Defines the reset signal's polarity.
+
 sync/async
 ----------
 |OK|
@@ -20,6 +22,12 @@ cpuif_reset
 -----------
 |OK|

+Specify that this signal shall be used as alternate reset signal for the CPU
+interface for this regblock.
+
 field_reset
 -----------
 |OK|
+
+Specify that this signal is used as an alternate reset signal for all fields
+instantiated in sub-hierarchies relative to this signal.
--- a/src/peakrdl_regblock/about.py
+++ b/src/peakrdl_regblock/about.py
@@ -1 +1 @@
-__version__ = "0.6.0"
+__version__ = "0.7.0"