bslathi19/PeakRDL-regblock
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Lint and typing cleanup

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This commit is contained in:
Alex Mykyta
2022-02-25 23:05:16 -08:00
parent da3ed05492
commit 7a890b56c5
26 changed files with 852 additions and 94 deletions
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15
peakrdl/regblock/field_logic/generators.py
View File

@@ -1,14 +1,15 @@
from typing import TYPE_CHECKING
from typing import TYPE_CHECKING, List
from collections import OrderedDict
from ..struct_generator import RDLStructGenerator
from ..forloop_generator import RDLForLoopGenerator
from ..utils import get_indexed_path, get_always_ff_event
from ..utils import get_always_ff_event
if TYPE_CHECKING:
from . import FieldLogic
from systemrdl.node import FieldNode, RegNode
from .bases import SVLogic
class CombinationalStructGenerator(RDLStructGenerator):
@@ -23,7 +24,7 @@ class CombinationalStructGenerator(RDLStructGenerator):
return
# collect any extra combo signals that this field requires
extra_combo_signals = OrderedDict()
extra_combo_signals = OrderedDict() # type: OrderedDict[str, SVLogic]
for conditional in self.field_logic.get_conditionals(node):
for signal in conditional.get_extra_combo_signals(node):
if signal.name in extra_combo_signals:
@@ -61,7 +62,7 @@ class CombinationalStructGenerator(RDLStructGenerator):
class FieldStorageStructGenerator(RDLStructGenerator):
def __init__(self, field_logic: 'FieldLogic'):
def __init__(self, field_logic: 'FieldLogic') -> None:
super().__init__()
self.field_logic = field_logic
@@ -79,15 +80,15 @@ class FieldStorageStructGenerator(RDLStructGenerator):
class FieldLogicGenerator(RDLForLoopGenerator):
i_type = "genvar"
def __init__(self, field_logic: 'FieldLogic'):
def __init__(self, field_logic: 'FieldLogic') -> None:
super().__init__()
self.field_logic = field_logic
self.exp = field_logic.exp
self.field_storage_template = self.field_logic.exp.jj_env.get_template(
"field_logic/templates/field_storage.sv"
)
self.intr_fields = []
self.halt_fields = []
self.intr_fields = [] # type: List[FieldNode]
self.halt_fields = [] # type: List[FieldNode]
def enter_Reg(self, node: 'RegNode') -> None:

20
peakrdl/regblock/field_logic/hw_interrupts.py
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@@ -1,9 +1,9 @@
from typing import TYPE_CHECKING, List
from .bases import NextStateConditional
from systemrdl.rdltypes import InterruptType
from .bases import NextStateConditional
if TYPE_CHECKING:
from systemrdl.node import FieldNode
@@ -28,7 +28,7 @@ class Sticky(NextStateConditional):
I = self.exp.hwif.get_input_identifier(field)
return [
f"next_c = {I};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
@@ -51,7 +51,7 @@ class Stickybit(NextStateConditional):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | {I};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class PosedgeStickybit(NextStateConditional):
@@ -77,7 +77,7 @@ class PosedgeStickybit(NextStateConditional):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | (~{Iq} & {I});",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class NegedgeStickybit(NextStateConditional):
@@ -103,7 +103,7 @@ class NegedgeStickybit(NextStateConditional):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | ({Iq} & ~{I});",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class BothedgeStickybit(NextStateConditional):
@@ -129,7 +129,7 @@ class BothedgeStickybit(NextStateConditional):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | ({Iq} ^ {I});",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class PosedgeNonsticky(NextStateConditional):
@@ -152,7 +152,7 @@ class PosedgeNonsticky(NextStateConditional):
Iq = self.exp.field_logic.get_next_q_identifier(field)
return [
f"next_c = ~{Iq} & {I};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class NegedgeNonsticky(NextStateConditional):
@@ -175,7 +175,7 @@ class NegedgeNonsticky(NextStateConditional):
Iq = self.exp.field_logic.get_next_q_identifier(field)
return [
f"next_c = {Iq} & ~{I};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class BothedgeNonsticky(NextStateConditional):
@@ -198,5 +198,5 @@ class BothedgeNonsticky(NextStateConditional):
Iq = self.exp.field_logic.get_next_q_identifier(field)
return [
f"next_c = {Iq} ^ {I};",
f"load_next_c = '1;",
"load_next_c = '1;",
]

4
peakrdl/regblock/field_logic/hw_set_clr.py
View File

@@ -35,7 +35,7 @@ class HWSet(NextStateConditional):
return [
f"next_c = {next_val};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
@@ -68,5 +68,5 @@ class HWClear(NextStateConditional):
return [
f"next_c = {next_val};",
f"load_next_c = '1;",
"load_next_c = '1;",
]

2
peakrdl/regblock/field_logic/hw_write.py
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@@ -38,7 +38,7 @@ class AlwaysWrite(NextStateConditional):
return [
f"next_c = {next_val};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class WEWrite(AlwaysWrite):

8
peakrdl/regblock/field_logic/sw_onread.py
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@@ -23,8 +23,8 @@ class ClearOnRead(_OnRead):
def get_assignments(self, field: 'FieldNode') -> List[str]:
return [
f"next_c = '0;",
f"load_next_c = '1;",
"next_c = '0;",
"load_next_c = '1;",
]
@@ -34,6 +34,6 @@ class SetOnRead(_OnRead):
def get_assignments(self, field: 'FieldNode') -> List[str]:
return [
f"next_c = '1;",
f"load_next_c = '1;",
"next_c = '1;",
"load_next_c = '1;",
]

22
peakrdl/regblock/field_logic/sw_onwrite.py
View File

@@ -41,7 +41,7 @@ class WriteOneSet(_OnWrite):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | {self._wr_data(field)};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class WriteOneClear(_OnWrite):
@@ -52,7 +52,7 @@ class WriteOneClear(_OnWrite):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} & ~{self._wr_data(field)};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class WriteOneToggle(_OnWrite):
@@ -63,7 +63,7 @@ class WriteOneToggle(_OnWrite):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} ^ {self._wr_data(field)};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class WriteZeroSet(_OnWrite):
@@ -74,7 +74,7 @@ class WriteZeroSet(_OnWrite):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} | ~{self._wr_data(field)};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class WriteZeroClear(_OnWrite):
@@ -85,7 +85,7 @@ class WriteZeroClear(_OnWrite):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} & {self._wr_data(field)};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class WriteZeroToggle(_OnWrite):
@@ -96,7 +96,7 @@ class WriteZeroToggle(_OnWrite):
R = self.exp.field_logic.get_storage_identifier(field)
return [
f"next_c = {R} ^ ~{self._wr_data(field)};",
f"load_next_c = '1;",
"load_next_c = '1;",
]
class WriteClear(_OnWrite):
@@ -105,8 +105,8 @@ class WriteClear(_OnWrite):
def get_assignments(self, field: 'FieldNode') -> List[str]:
return [
f"next_c = '0;",
f"load_next_c = '1;",
"next_c = '0;",
"load_next_c = '1;",
]
class WriteSet(_OnWrite):
@@ -115,8 +115,8 @@ class WriteSet(_OnWrite):
def get_assignments(self, field: 'FieldNode') -> List[str]:
return [
f"next_c = '1;",
f"load_next_c = '1;",
"next_c = '1;",
"load_next_c = '1;",
]
class Write(_OnWrite):
@@ -126,5 +126,5 @@ class Write(_OnWrite):
def get_assignments(self, field: 'FieldNode') -> List[str]:
return [
f"next_c = {self._wr_data(field)};",
f"load_next_c = '1;",
"load_next_c = '1;",
]

4
peakrdl/regblock/field_logic/sw_singlepulse.py
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@@ -17,6 +17,6 @@ class Singlepulse(NextStateConditional):
def get_assignments(self, field: 'FieldNode') -> List[str]:
return [
f"next_c = '0;",
f"load_next_c = '1;",
"next_c = '0;",
"load_next_c = '1;",
]