Lint and typing cleanup
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@@ -1,4 +1,4 @@
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from typing import TYPE_CHECKING
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from typing import TYPE_CHECKING, List
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from ..forloop_generator import RDLForLoopGenerator, LoopBody
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@@ -30,8 +30,8 @@ class ReadbackAssignmentGenerator(RDLForLoopGenerator):
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# array. The array width is equal to the CPUIF bus width. Each entry in
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# the array represents an aligned read access.
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self.current_offset = 0
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self.start_offset_stack = []
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self.dim_stack = []
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self.start_offset_stack = [] # type: List[int]
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self.dim_stack = [] # type: List[int]
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@property
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def current_offset_str(self) -> str:
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@@ -99,7 +99,7 @@ class ReadbackAssignmentGenerator(RDLForLoopGenerator):
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# Number of registers enclosed in this loop
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n_regs = self.current_offset - start_offset
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self.current_loop.n_regs = n_regs
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self.current_loop.n_regs = n_regs # type: ignore
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super().pop_loop()
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