From 98ab38ae4dc8a69259235bbf11740ef44d7416ab Mon Sep 17 00:00:00 2001 From: Alex Mykyta Date: Mon, 21 Feb 2022 22:42:03 -0800 Subject: [PATCH] fix wavedrom json quotes --- docs/cpuif/internal_protocol.rst | 108 +++++++++++++++---------------- docs/props/field.rst | 108 +++++++++++++++---------------- docs/props/rhs_props.rst | 28 ++++---- 3 files changed, 122 insertions(+), 122 deletions(-) diff --git a/docs/cpuif/internal_protocol.rst b/docs/cpuif/internal_protocol.rst index 8d72717..33383ae 100644 --- a/docs/cpuif/internal_protocol.rst +++ b/docs/cpuif/internal_protocol.rst @@ -93,34 +93,34 @@ Both are valid and CPU interface logic shall be designed to anticipate either. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p....'}, - {'name': 'cpuif_req', 'wave': '010..'}, - {'name': 'cpuif_req_is_wr', 'wave': 'x2x..'}, - {'name': 'cpuif_addr', 'wave': 'x2x..', data: ['A']}, + "signal": [ + {"name": "clk", "wave": "p...."}, + {"name": "cpuif_req", "wave": "010.."}, + {"name": "cpuif_req_is_wr", "wave": "x2x.."}, + {"name": "cpuif_addr", "wave": "x2x..", "data": ["A"]}, {}, - {'name': 'cpuif_*_ack', 'wave': '010..'}, - {'name': 'cpuif_*_err', 'wave': 'x2x..'}, + {"name": "cpuif_*_ack", "wave": "010.."}, + {"name": "cpuif_*_err", "wave": "x2x.."}, ], - 'foot': { - 'text': "Zero-latency transfer" + "foot": { + "text": "Zero-latency transfer" } } .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p..|...'}, - {'name': 'cpuif_req', 'wave': '010|...'}, - {'name': 'cpuif_req_is_wr', 'wave': 'x2x|...'}, - {'name': 'cpuif_addr', 'wave': 'x2x|...', data: ['A']}, + "signal": [ + {"name": "clk", "wave": "p..|..."}, + {"name": "cpuif_req", "wave": "010|..."}, + {"name": "cpuif_req_is_wr", "wave": "x2x|..."}, + {"name": "cpuif_addr", "wave": "x2x|...", "data": ["A"]}, {}, - {'name': 'cpuif_*_ack', 'wave': '0..|10.'}, - {'name': 'cpuif_*_err', 'wave': 'x..|2x.'}, + {"name": "cpuif_*_ack", "wave": "0..|10."}, + {"name": "cpuif_*_err", "wave": "x..|2x."}, ], - 'foot': { - 'text': "Transfer with non-zero latency" + "foot": { + "text": "Transfer with non-zero latency" } } @@ -134,18 +134,18 @@ For brevity, only showing non-zero latency transfers. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p..|...'}, - {'name': 'cpuif_req', 'wave': '010|...'}, - {'name': 'cpuif_req_is_wr', 'wave': 'x0x|...'}, - {'name': 'cpuif_addr', 'wave': 'x3x|...', data: ['A']}, + "signal": [ + {"name": "clk", "wave": "p..|..."}, + {"name": "cpuif_req", "wave": "010|..."}, + {"name": "cpuif_req_is_wr", "wave": "x0x|..."}, + {"name": "cpuif_addr", "wave": "x3x|...", "data": ["A"]}, {}, - {'name': 'cpuif_rd_ack', 'wave': '0..|10.'}, - {'name': 'cpuif_rd_err', 'wave': 'x..|0x.'}, - {'name': 'cpuif_rd_data', 'wave': 'x..|5x.', data: ['D']}, + {"name": "cpuif_rd_ack", "wave": "0..|10."}, + {"name": "cpuif_rd_err", "wave": "x..|0x."}, + {"name": "cpuif_rd_data", "wave": "x..|5x.", "data": ["D"]}, ], - 'foot': { - 'text': "Read Transaction" + "foot": { + "text": "Read Transaction" } } @@ -153,18 +153,18 @@ For brevity, only showing non-zero latency transfers. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p..|...'}, - {'name': 'cpuif_req', 'wave': '010|...'}, - {'name': 'cpuif_req_is_wr', 'wave': 'x1x|...'}, - {'name': 'cpuif_addr', 'wave': 'x3x|...', data: ['A']}, - {'name': 'cpuif_wr_data', 'wave': 'x5x|...', data: ['D']}, + "signal": [ + {"name": "clk", "wave": "p..|..."}, + {"name": "cpuif_req", "wave": "010|..."}, + {"name": "cpuif_req_is_wr", "wave": "x1x|..."}, + {"name": "cpuif_addr", "wave": "x3x|...", "data": ["A"]}, + {"name": "cpuif_wr_data", "wave": "x5x|...", "data": ["D"]}, {}, - {'name': 'cpuif_wr_ack', 'wave': '0..|10.'}, - {'name': 'cpuif_wr_err', 'wave': 'x..|0x.'}, + {"name": "cpuif_wr_ack", "wave": "0..|10."}, + {"name": "cpuif_wr_err", "wave": "x..|0x."}, ], - 'foot': { - 'text': "Write Transaction" + "foot": { + "text": "Write Transaction" } } @@ -176,15 +176,15 @@ If the CPU interface supports it, read and write operations can be pipelined. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p......'}, - {'name': 'cpuif_req', 'wave': '01..0..'}, - {'name': 'cpuif_req_is_wr', 'wave': 'x0..x..'}, - {'name': 'cpuif_addr', 'wave': 'x333x..', data: ['A1', 'A2', 'A3']}, + "signal": [ + {"name": "clk", "wave": "p......"}, + {"name": "cpuif_req", "wave": "01..0.."}, + {"name": "cpuif_req_is_wr", "wave": "x0..x.."}, + {"name": "cpuif_addr", "wave": "x333x..", "data": ["A1", "A2", "A3"]}, {}, - {'name': 'cpuif_rd_ack', 'wave': '0.1..0.'}, - {'name': 'cpuif_rd_err', 'wave': 'x.0..x.'}, - {'name': 'cpuif_rd_data', 'wave': 'x.555x.', data: ['D1', 'D2', 'D3']}, + {"name": "cpuif_rd_ack", "wave": "0.1..0."}, + {"name": "cpuif_rd_err", "wave": "x.0..x."}, + {"name": "cpuif_rd_data", "wave": "x.555x.", "data": ["D1", "D2", "D3"]}, ] } @@ -208,15 +208,15 @@ In the following example, the regblock is configured such that: .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p.......'}, - {'name': 'cpuif_req', 'wave': '01.....0'}, - {'name': 'cpuif_req_is_wr', 'wave': 'x1.0.1.x'}, - {'name': 'cpuif_addr', 'wave': 'x33443.x', data: ['W1', 'W2', 'R1', 'R2', 'W3']}, - {'name': 'cpuif_req_stall_wr', 'wave': '0...1.0.'}, + "signal": [ + {"name": "clk", "wave": "p......."}, + {"name": "cpuif_req", "wave": "01.....0"}, + {"name": "cpuif_req_is_wr", "wave": "x1.0.1.x"}, + {"name": "cpuif_addr", "wave": "x33443.x", "data": ["W1", "W2", "R1", "R2", "W3"]}, + {"name": "cpuif_req_stall_wr", "wave": "0...1.0."}, {}, - {'name': 'cpuif_rd_ack', 'wave': '0...220.', data: ['R1', 'R2']}, - {'name': 'cpuif_wr_ack', 'wave': '0220..20', data: ['W1', 'W2', 'W3']}, + {"name": "cpuif_rd_ack", "wave": "0...220.", "data": ["R1", "R2"]}, + {"name": "cpuif_wr_ack", "wave": "0220..20", "data": ["W1", "W2", "W3"]}, ] } diff --git a/docs/props/field.rst b/docs/props/field.rst index 4e4b3ee..8b6e91a 100644 --- a/docs/props/field.rst +++ b/docs/props/field.rst @@ -23,10 +23,10 @@ If set, field will get cleared back to zero after being written. .. wavedrom:: - {'signal': [ - {'name': 'clk', 'wave': 'p.....'}, - {'name': '', 'wave': '0.10..'}, - {'name': 'hwif_out..value', 'wave': '0..10.'} + {"signal": [ + {"name": "clk", "wave": "p....."}, + {"name": '', "wave": "0.10.."}, + {"name": 'hwif_out..value', "wave": "0..10."} ]} sw @@ -43,10 +43,10 @@ operation. .. wavedrom:: - {'signal': [ - {'name': 'clk', 'wave': 'p....'}, - {'name': 'hwif_in..next', 'wave': 'x.=x.', data: ['D']}, - {'name': 'hwif_out..swacc', 'wave': '0.10.'} + {"signal": [ + {"name": "clk", "wave": "p...."}, + {"name": 'hwif_in..next', "wave": 'x.=x.', "data": ["D"]}, + {"name": 'hwif_out..swacc', "wave": "0.10."} ]} @@ -59,10 +59,10 @@ field is being modified by software. .. wavedrom:: - {'signal': [ - {'name': 'clk', 'wave': 'p.....'}, - {'name': 'hwif_out..value', 'wave': '=..=..', data: ['old', 'new']}, - {'name': 'hwif_out..swmod', 'wave': '0.10..'} + {"signal": [ + {"name": "clk", "wave": "p....."}, + {"name": 'hwif_out..value', "wave": '=..=..', "data": ["old", "new"]}, + {"name": 'hwif_out..swmod', "wave": "0.10.."} ]} @@ -141,12 +141,12 @@ If true, infers the existence of input signal: ``hwif_in..we``, ``hwif_in..wel`` .. wavedrom:: - {'signal': [ - {'name': 'clk', 'wave': 'p....'}, - {'name': 'hwif_in..next', 'wave': 'x.=x.', data: ['D']}, - {'name': 'hwif_in..we', 'wave': '0.10.',}, - {'name': 'hwif_in..wel', 'wave': '1.01.',}, - {'name': '', 'wave': 'x..=.', data: ['D']} + {"signal": [ + {"name": "clk", "wave": "p...."}, + {"name": 'hwif_in..next', "wave": 'x.=x.', "data": ["D"]}, + {"name": 'hwif_in..we', "wave": "0.10.",}, + {"name": 'hwif_in..wel', "wave": "1.01.",}, + {"name": '', "wave": 'x..=.', "data": ["D"]} ]} boolean @@ -216,14 +216,14 @@ asserted if the counter value is greater or equal to the threshold. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p......'}, - {'name': 'hwif_in..incr', 'wave': '01...0.'}, - {'name': '', 'wave': '=.=3==..', data: [4,5,6,7,8,9]}, - {'name': 'hwif_out..incrthreshold', 'wave': '0..1....'} + "signal": [ + {"name": "clk", "wave": "p......"}, + {"name": 'hwif_in..incr', "wave": "01...0."}, + {"name": '', "wave": '=.=3==..', "data": [4,5,6,7,8,9]}, + {"name": 'hwif_out..incrthreshold', "wave": "0..1...."} ], - 'foot': { - 'text': "Example where incrthreshold = 6" + "foot": { + "text": "Example where incrthreshold = 6" } } @@ -272,14 +272,14 @@ the counter is about to wrap. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p.......'}, - {'name': 'hwif_in..incr', 'wave': '0101010.'}, - {'name': '', 'wave': '=.=.=.=.', data: [14,15,0,1]}, - {'name': 'hwif_out..overflow', 'wave': '0..10...'} + "signal": [ + {"name": "clk", "wave": "p......."}, + {"name": 'hwif_in..incr', "wave": "0101010."}, + {"name": '', "wave": '=.=.=.=.', "data": [14,15,0,1]}, + {"name": 'hwif_out..overflow', "wave": "0..10..."} ], - 'foot': { - 'text': "A 4-bit counter overflowing" + "foot": { + "text": "A 4-bit counter overflowing" } } @@ -322,14 +322,14 @@ asserted if the counter value is less than or equal to the threshold. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p......'}, - {'name': 'hwif_in..decr', 'wave': '01...0.'}, - {'name': '', 'wave': '=.=3==..', data: [9,8,7,6,5,4]}, - {'name': 'hwif_out..decrthreshold', 'wave': '0..1....'} + "signal": [ + {"name": "clk", "wave": "p......"}, + {"name": 'hwif_in..decr', "wave": "01...0."}, + {"name": '', "wave": '=.=3==..', "data": [9,8,7,6,5,4]}, + {"name": 'hwif_out..decrthreshold', "wave": "0..1...."} ], - 'foot': { - 'text': "Example where incrthreshold = 7" + "foot": { + "text": "Example where incrthreshold = 7" } } @@ -377,14 +377,14 @@ the counter is about to wrap. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p.......'}, - {'name': 'hwif_in..decr', 'wave': '0101010.'}, - {'name': '', 'wave': '=.=.=.=.', data: [1,0,15,14]}, - {'name': 'hwif_out..underflow', 'wave': '0..10...'} + "signal": [ + {"name": "clk", "wave": "p......."}, + {"name": 'hwif_in..decr', "wave": "0101010."}, + {"name": '', "wave": '=.=.=.=.', "data": [1,0,15,14]}, + {"name": 'hwif_out..underflow', "wave": "0..10..."} ], - 'foot': { - 'text': "A 4-bit counter underflowing" + "foot": { + "text": "A 4-bit counter underflowing" } } @@ -484,10 +484,10 @@ The waveform below demonstrates a level-sensitive interrupt: .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p.....'}, - {'name': 'hwif_in..next', 'wave': '010...'}, - {'name': '', 'wave': '0.1...'} + "signal": [ + {"name": "clk", "wave": "p....."}, + {"name": 'hwif_in..next', "wave": "010..."}, + {"name": '', "wave": "0.1..."} ] } @@ -503,10 +503,10 @@ field contents are cleared back to 0 by a software access. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p.....'}, - {'name': 'hwif_in..next', 'wave': '23.22.', data: [0,10,20,30]}, - {'name': '', 'wave': '2.3...', data: [0, 10]} + "signal": [ + {"name": "clk", "wave": "p....."}, + {"name": 'hwif_in..next', "wave": "23.22.", "data": [0,10,20,30]}, + {"name": '', "wave": "2.3...", "data": [0, 10]} ] } diff --git a/docs/props/rhs_props.rst b/docs/props/rhs_props.rst index b00df6d..078a1f7 100644 --- a/docs/props/rhs_props.rst +++ b/docs/props/rhs_props.rst @@ -100,14 +100,14 @@ at its saturation value. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p......'}, - {'name': 'hwif_in..decr', 'wave': '0101010'}, - {'name': '', 'wave': '=.=....', data: [1,0]}, - {'name': '', 'wave': '0.1....'} + "signal": [ + {"name": "clk", "wave": "p......"}, + {"name": 'hwif_in..decr', "wave": "0101010"}, + {"name": '', "wave": '=.=....', "data": [1,0]}, + {"name": '', "wave": "0.1...."} ], - 'foot': { - 'text': "A 4-bit counter saturating" + "foot": { + "text": "A 4-bit counter saturating" } } @@ -147,14 +147,14 @@ at its saturation value. .. wavedrom:: { - 'signal': [ - {'name': 'clk', 'wave': 'p......'}, - {'name': 'hwif_in..incr', 'wave': '0101010'}, - {'name': '', 'wave': '=.=....', data: [14,15]}, - {'name': '', 'wave': '0.1....'} + "signal": [ + {"name": "clk", "wave": "p......"}, + {"name": 'hwif_in..incr', "wave": "0101010"}, + {"name": '', "wave": '=.=....', "data": [14,15]}, + {"name": '', "wave": "0.1...."} ], - 'foot': { - 'text': "A 4-bit counter saturating" + "foot": { + "text": "A 4-bit counter saturating" } }