Use sized integer literals in comparisons. #49
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@@ -10,7 +10,7 @@ from .field_logic import FieldLogic
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from .dereferencer import Dereferencer
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from .readback import Readback
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from .identifier_filter import kw_filter as kwf
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from .utils import clog2
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from .scan_design import DesignScanner
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from .validate_design import DesignValidator
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from .cpuif import CpuifBase
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@@ -134,9 +134,6 @@ class RegblockExporter:
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if kwargs:
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raise TypeError(f"got an unexpected keyword argument '{list(kwargs.keys())[0]}'")
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# Scan the design for pre-export information
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DesignScanner(self).do_scan()
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if generate_hwif_report:
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path = os.path.join(output_dir, f"{self.ds.module_name}_hwif.rpt")
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hwif_report_file = open(path, "w", encoding='utf-8') # pylint: disable=consider-using-with
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@@ -251,9 +248,13 @@ class DesignState:
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# Track any referenced enums
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self.user_enums = [] # type: List[Type[UserEnum]]
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#------------------------
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# Scan the design to fill in above variables
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DesignScanner(self).do_scan()
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#------------------------
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# Min address width encloses the total size AND at least 1 useful address bit
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self.addr_width = max(clog2(self.top_node.size), clog2(self.cpuif_data_width//8) + 1)
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self.addr_width = (self.top_node.size - 1).bit_length()
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if user_addr_width is not None:
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if user_addr_width < self.addr_width:
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msg.fatal(f"User-specified address width shall be greater than or equal to {self.addr_width}.")
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