Rework cpuif to support transaction pipelining. Add more docs. update simulator

peakrdl/regblock/cpuif/passthrough/passthrough_tmpl.sv

@@ -2,6 +2,8 @@ assign cpuif_req = s_cpuif_req;
 assign cpuif_req_is_wr = s_cpuif_req_is_wr;
 assign cpuif_addr = s_cpuif_addr;
 assign cpuif_wr_data = s_cpuif_wr_data;
+assign s_cpuif_req_stall_wr = cpuif_req_stall_wr;
+assign s_cpuif_req_stall_rd = cpuif_req_stall_rd;
 assign s_cpuif_rd_ack = cpuif_rd_ack;
 assign s_cpuif_rd_err = cpuif_rd_err;
 assign s_cpuif_rd_data = cpuif_rd_data;