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peakrdl/regblock/cpuif/apb3/apb3_tmpl.sv

@@ -3,8 +3,8 @@
 {% block body %}
 // Request
 logic is_active;
-always_ff {{get_always_ff_event(cpuif_reset)}} begin
-    if({{cpuif_reset.activehigh_identifier}}) begin
+always_ff {{get_always_ff_event(cpuif.reset)}} begin
+    if({{cpuif.reset.activehigh_identifier}}) begin
         is_active <= '0;
         cpuif_req <= '0;
         cpuif_req_is_wr <= '0;
@@ -16,7 +16,11 @@ always_ff {{get_always_ff_event(cpuif_reset)}} begin
                 is_active <= '1;
                 cpuif_req <= '1;
                 cpuif_req_is_wr <= {{cpuif.signal("pwrite")}};
-                cpuif_addr <= {{cpuif.signal("paddr")}}[ADDR_WIDTH-1:0];
+                {%- if cpuif.data_width == 8 %}
+                cpuif_addr <= {{cpuif.signal("paddr")}}[{{cpuif.addr_width-1}}:0];
+                {%- else %}
+                cpuif_addr <= { {{-cpuif.signal("paddr")}}[{{cpuif.addr_width-1}}:{{clog2(cpuif.data_width//8)}}], {{clog2(cpuif.data_width//8)}}'b0};
+                {%- endif %}
                 cpuif_wr_data <= {{cpuif.signal("pwdata")}};
             end
         end else begin
@@ -27,7 +31,7 @@ always_ff {{get_always_ff_event(cpuif_reset)}} begin
         end
     end
 end
-assign cpuif_wr_bitstrb = '0;
+assign cpuif_wr_biten = '1;
 
 // Response
 assign {{cpuif.signal("pready")}} = cpuif_rd_ack | cpuif_wr_ack;

peakrdl/regblock/cpuif/base.py

@@ -1,6 +1,6 @@
 from typing import TYPE_CHECKING
 
-from ..utils import get_always_ff_event
+from ..utils import get_always_ff_event, clog2
 
 if TYPE_CHECKING:
     from ..exporter import RegblockExporter
@@ -11,7 +11,7 @@ class CpuifBase:
 
     def __init__(self, exp:'RegblockExporter', cpuif_reset:'SignalBase', data_width:int=32, addr_width:int=32):
         self.exp = exp
-        self.cpuif_reset = cpuif_reset
+        self.reset = cpuif_reset
         self.data_width = data_width
         self.addr_width = addr_width
 
@@ -22,10 +22,8 @@ class CpuifBase:
     def get_implementation(self) -> str:
         context = {
             "cpuif": self,
-            "cpuif_reset": self.cpuif_reset,
-            "data_width": self.data_width,
-            "addr_width": self.addr_width,
             "get_always_ff_event": get_always_ff_event,
+            "clog2": clog2,
         }
 
         template = self.exp.jj_env.get_template(self.template_path)