From e1d7b3aa38a8b203f6def48f50e8553eb901a8b3 Mon Sep 17 00:00:00 2001 From: Sebastien Baillou Date: Sun, 16 Nov 2025 00:38:10 +0100 Subject: [PATCH] test: revert test_parity assign/deassign syntax with Xilinx simulator --- tests/test_parity/tb_template.sv | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tests/test_parity/tb_template.sv b/tests/test_parity/tb_template.sv index a92b483..7f32452 100644 --- a/tests/test_parity/tb_template.sv +++ b/tests/test_parity/tb_template.sv @@ -24,8 +24,13 @@ disable fork; cpuif.write('h0, 'd0); +`ifdef XILINX_XSIM + assign dut.field_storage.r1.f1.value = 16'd1; + deassign dut.field_storage.r1.f1.value; +`else force dut.field_storage.r1.f1.value = 16'd1; release dut.field_storage.r1.f1.value; +`endif @cb; @cb; assert(cb.parity_error == 1'b1);