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This commit is contained in:
Alex Mykyta
2023-08-03 22:53:22 -07:00
parent 5c3dd6e6bb
commit eef8f7cdb4
13 changed files with 118 additions and 92 deletions
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docs/cpuif/avalon.rst
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@@ -8,14 +8,15 @@ CPU interface.
The Avalon interface comes in two i/o port flavors:
SystemVerilog Interface
Class: :class:`peakrdl_regblock.cpuif.avalon.Avalon_Cpuif`
Interface Definition: :download:`avalon_mm_intf.sv <../../hdl-src/avalon_mm_intf.sv>`
* Command line: ``--cpuif avalon-mm``
* Interface Definition: :download:`avalon_mm_intf.sv <../../hdl-src/avalon_mm_intf.sv>`
* Class: :class:`peakrdl_regblock.cpuif.avalon.Avalon_Cpuif`
Flattened inputs/outputs
Flattens the interface into discrete input and output ports.
Class: :class:`peakrdl_regblock.cpuif.avalon.Avalon_Cpuif_flattened`
* Command line: ``--cpuif avalon-mm-flat``
* Class: :class:`peakrdl_regblock.cpuif.avalon.Avalon_Cpuif_flattened`
Implementation Details