Doc updates

docs/udps/extended_swacc.rst

@@ -19,7 +19,8 @@ These UDP definitions, along with others supported by PeakRDL-regblock can be
 enabled by compiling the following file along with your design:
 :download:`regblock_udps.rdl <../../hdl-src/regblock_udps.rdl>`.
 
-``rd_swacc``
+.. describe:: rd_swacc
+
     If true, infers an output signal ``hwif_out..rd_swacc`` that is asserted
     when accessed by a software read operation. The output signal is asserted
     on the same clock cycle that the field is being sampled during the software
@@ -34,7 +35,8 @@ enabled by compiling the following file along with your design:
         ]}
 
 
-``wr_swacc``
+.. describe:: wr_swacc
+
     If true, infers an output signal ``hwif_out..wr_swacc`` that is asserted
     as the field is being modified by a software write operation.
 

docs/udps/read_buffering.rst

@@ -31,7 +31,8 @@ These UDP definitions, along with others supported by PeakRDL-regblock can be
 enabled by compiling the following file along with your design:
 :download:`regblock_udps.rdl <../../hdl-src/regblock_udps.rdl>`.
 
-``buffer_reads``
+.. describe:: buffer_reads
+
     *   Assigned value is a boolean.
     *   If true, enables double-buffering of software reads of this register.
     *   The read buffer will load the register's field values when its trigger
@@ -41,7 +42,8 @@ enabled by compiling the following file along with your design:
     *   When read by software the data returned is from the buffer contents, not
         directly from the register's fields.
 
-``rbuffer_trigger``
+.. describe:: rbuffer_trigger
+
     *   Assigned value is a reference to a register, single-bit field, signal, or
         single-bit property.
     *   Controls when the double-buffer loads the register's field vaues into the

docs/udps/write_buffering.rst

@@ -37,7 +37,8 @@ These UDP definitions, along with others supported by PeakRDL-regblock can be
 enabled by compiling the following file along with your design:
 :download:`regblock_udps.rdl <../../hdl-src/regblock_udps.rdl>`.
 
-``buffer_writes``
+.. describe:: buffer_writes
+
     *   Assigned value is a boolean.
     *   If true, enables double-buffering of writes to this register.
     *   Any software write operation to a buffered register is held back in a
@@ -47,7 +48,8 @@ enabled by compiling the following file along with your design:
     *   Unless specified otherwise, the buffer trigger occurs when the highest
         address of the buffered register is written.
 
-``wbuffer_trigger``
+.. describe:: wbuffer_trigger
+
     *   Assigned value is a reference to a register, single-bit field, signal,
         or single-bit property.
     *   Controls when the double-buffer commits the software write operation to