testcase framework
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[](https://pypi.org/project/peakrdl-regblock)
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# PeakRDL-regblock
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Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.
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## Installing
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Install from [PyPi](https://pypi.org/project/peakrdl-regblock) using pip:
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python3 -m pip install peakrdl-regblock
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(Not published to PyPi yet)
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