Alex Mykyta 0fa26f2030 Enhance AXI4-Lite CPU Interface to support high performance pipelined transactions

2022-02-15 23:04:28 -08:00

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cpuif

Enhance AXI4-Lite CPU Interface to support high performance pipelined transactions

2022-02-15 23:04:28 -08:00

dev_notes

Add interrupt tests!

2022-01-25 21:24:17 -08:00

diagrams

Rework cpuif to support transaction pipelining. Add more docs. update simulator

2022-02-13 17:25:45 -08:00

img

move docs

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props

Add interrupt tests!

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architecture.rst

Enhance AXI4-Lite CPU Interface to support high performance pipelined transactions

2022-02-15 23:04:28 -08:00

conf.py

move docs

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hwif.rst

move docs

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index.rst

Enhance AXI4-Lite CPU Interface to support high performance pipelined transactions

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limitations.rst

move docs

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Makefile

move docs

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requirements.txt

move docs

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