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bslathi19/PeakRDL-regblock
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1926aff7b1829befdd8f2f5d4a641f95a24e4de5
PeakRDL-regblock/tests/test_structural_sw_rw
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Alex Mykyta 833c515cd2 Re-enable xsim for testcases. Works better in Vivado 2024.2
2025-04-11 22:19:19 -07:00
..
__init__.py
Reorganize test dir to ensure test of installed pkg
2022-02-28 23:08:41 -08:00
regblock.rdl
Add support for wide registers (where accesswidth < regwidth)
2022-10-17 22:13:29 -07:00
tb_template.sv
Re-enable xsim for testcases. Works better in Vivado 2024.2
2025-04-11 22:19:19 -07:00
testcase.py
Reorganize how tb infrstructure selects toolchains
2023-10-22 11:04:43 -07:00
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