Alex Mykyta 5324b594bf Improve template path handling. Add synthesis tests

2022-02-23 22:53:54 -08:00

..

cpuif

Improve template path handling. Add synthesis tests

2022-02-23 22:53:54 -08:00

field_logic

Add interrupt tests!

2022-01-25 21:24:17 -08:00

hwif

Fix hwif typedef uniquification to also account for varying field widths

2022-01-25 22:26:14 -08:00

readback

Signals working!

2021-12-15 22:03:57 -08:00

__about__.py

More testcases & documentation

2021-12-04 17:33:35 -08:00

__init__.py

basic framework

2021-06-01 23:13:09 -07:00

addr_decode.py

Enhance AXI4-Lite CPU Interface to support high performance pipelined transactions

2022-02-15 23:04:28 -08:00

dereferencer.py

Implement interrupts

2022-01-19 21:54:42 -08:00

exporter.py

Improve template path handling. Add synthesis tests

2022-02-23 22:53:54 -08:00

forloop_generator.py

First read/write!

2021-12-04 17:31:12 -08:00

module_tmpl.sv

Enhance AXI4-Lite CPU Interface to support high performance pipelined transactions

2022-02-15 23:04:28 -08:00

package_tmpl.sv

more field logic

2021-12-04 17:31:12 -08:00

scan_design.py

Signals working!

2021-12-15 22:03:57 -08:00

struct_generator.py

Rework hwif to reuse typedefs more intelligently

2021-12-13 21:36:31 -08:00

utils.py

Enhance AXI4-Lite CPU Interface to support high performance pipelined transactions

2022-02-15 23:04:28 -08:00