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bslathi19/PeakRDL-regblock
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bb765e6ae3c130ba01bcb4842dde4e5dd105b67d
PeakRDL-regblock/tests/lib
History
Alex Mykyta bb765e6ae3 Add 's_' prefix to OBI port for consistency with all other cpuifs
2025-10-25 17:24:57 -07:00
..
cpuifs
Add 's_' prefix to OBI port for consistency with all other cpuifs
2025-10-25 17:24:57 -07:00
simulators
Add Xcelium simulator option
2025-10-10 09:58:36 -07:00
synthesizers
Re-enable xsim for testcases. Works better in Vivado 2024.2
2025-04-11 22:19:19 -07:00
__init__.py
Reorganize test dir to ensure test of installed pkg
2022-02-28 23:08:41 -08:00
base_testcase.py
Add testcases to cover design validation errors
2025-03-06 22:10:05 -08:00
external_block.sv
Simulator compatibility updates
2023-10-22 20:43:34 -07:00
external_reg.sv
Simulator compatibility updates
2023-10-22 20:43:34 -07:00
sim_testcase.py
Simulator compatibility updates
2023-10-22 20:43:34 -07:00
sv_line_anchor.py
Reorganize test dir to ensure test of installed pkg
2022-02-28 23:08:41 -08:00
synth_testcase.py
Reorganize how tb infrstructure selects toolchains
2023-10-22 11:04:43 -07:00
tb_base.sv
Fixup test bitswap. mypy
2024-12-18 22:04:12 -08:00
test_params.py
Add Intel Avalon MM cpuif. #40
2023-05-14 17:00:55 -07:00
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