18 lines
999 B
Plaintext
18 lines
999 B
Plaintext
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Interrupts seem to be pretty well-described.
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Basically...
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- If a register contains one or more fields that use the intr property,
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then it is implied to be an interrupt register
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--> Add RegNode.has_intr and RegNode.has_halt properties?
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- This register implies that there is an output irq signal that is propagated to the top, and it is the OR of all interrupt field bits
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- BUT in the multilevel interrupt example, perhaps this output gets suppressed?
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Suppress the output signal if Reg->intr gets referenced, since this means
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the user is doing a multi-level interrupt.
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This means that the register's interrupt signal is "consumed" by a second-level interrupt register
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- WTF about the "halt" concept?
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I assume this does NOT auto-imply an output?
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Mayby only imply a default halt output if:
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- an interrupt register has fields that use haltenable/haltmask
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- AND the interrupt register's reg->halt has not been referenced |