229 lines
8.4 KiB
Python
229 lines
8.4 KiB
Python
from typing import TYPE_CHECKING, Dict, Type
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import functools
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import sys
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from peakrdl.plugins.exporter import ExporterSubcommandPlugin
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from peakrdl.config import schema
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from peakrdl.plugins.entry_points import get_entry_points
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from .exporter import RegblockExporter
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from .cpuif import CpuifBase, apb3, apb4, axi4lite, passthrough, avalon, obi
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from .udps import ALL_UDPS
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if TYPE_CHECKING:
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import argparse
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from systemrdl.node import AddrmapNode
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class Exporter(ExporterSubcommandPlugin):
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short_desc = "Generate a SystemVerilog control/status register (CSR) block"
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udp_definitions = ALL_UDPS
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cfg_schema = {
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"cpuifs": {"*": schema.PythonObjectImport()},
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"default_reset": schema.Choice(["rst", "rst_n", "arst", "arst_n"]),
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"err_if_bad_addr": schema.Boolean(),
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"err_if_bad_rw": schema.Boolean(),
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}
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@functools.lru_cache()
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def get_cpuifs(self) -> Dict[str, Type[CpuifBase]]:
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# All built-in CPUIFs
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cpuifs = {
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"passthrough": passthrough.PassthroughCpuif,
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"apb3": apb3.APB3_Cpuif,
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"apb3-flat": apb3.APB3_Cpuif_flattened,
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"apb4": apb4.APB4_Cpuif,
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"apb4-flat": apb4.APB4_Cpuif_flattened,
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"axi4-lite": axi4lite.AXI4Lite_Cpuif,
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"axi4-lite-flat": axi4lite.AXI4Lite_Cpuif_flattened,
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"avalon-mm": avalon.Avalon_Cpuif,
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"avalon-mm-flat": avalon.Avalon_Cpuif_flattened,
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"obi": obi.OBI_Cpuif,
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"obi-flat": obi.OBI_Cpuif_flattened,
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}
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# Load any cpuifs specified via entry points
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for ep, dist in get_entry_points("peakrdl_regblock.cpuif"):
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name = ep.name
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cpuif = ep.load()
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if name in cpuifs:
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raise RuntimeError(f"A plugin for 'peakrdl-regblock' tried to load cpuif '{name}' but it already exists")
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if not issubclass(cpuif, CpuifBase):
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raise RuntimeError(f"A plugin for 'peakrdl-regblock' tried to load cpuif '{name}' but it not a CpuifBase class")
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cpuifs[name] = cpuif
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# Load any CPUIFs via config import
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for name, cpuif in self.cfg['cpuifs'].items():
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if name in cpuifs:
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raise RuntimeError(f"A plugin for 'peakrdl-regblock' tried to load cpuif '{name}' but it already exists")
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if not issubclass(cpuif, CpuifBase):
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raise RuntimeError(f"A plugin for 'peakrdl-regblock' tried to load cpuif '{name}' but it not a CpuifBase class")
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cpuifs[name] = cpuif
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return cpuifs
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def add_exporter_arguments(self, arg_group: 'argparse._ActionsContainer') -> None:
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cpuifs = self.get_cpuifs()
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arg_group.add_argument(
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"--cpuif",
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choices=cpuifs.keys(),
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default="apb3",
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help="Select the CPU interface protocol to use [apb3]"
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)
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arg_group.add_argument(
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"--module-name",
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metavar="NAME",
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default=None,
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help="Override the SystemVerilog module name"
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)
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arg_group.add_argument(
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"--package-name",
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metavar="NAME",
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default=None,
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help="Override the SystemVerilog package name"
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)
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arg_group.add_argument(
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"--type-style",
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dest="type_style",
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choices=['lexical', 'hier'],
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default="lexical",
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help="""Choose how HWIF struct type names are generated.
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The 'lexical' style will use RDL lexical scope & type names where
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possible and attempt to re-use equivalent type definitions.
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The 'hier' style uses component's hierarchy as the struct type name. [lexical]
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"""
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)
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arg_group.add_argument(
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"--hwif-report",
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action="store_true",
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default=False,
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help="Generate a HWIF report file"
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)
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arg_group.add_argument(
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"--addr-width",
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type=int,
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default=None,
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help="""Override the CPU interface's address width. By default,
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address width is sized to the contents of the regblock.
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"""
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)
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arg_group.add_argument(
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"--rt-read-fanin",
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action="store_true",
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default=False,
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help="""Enable additional read path retiming. Good for register
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blocks with large readback fan-in"""
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)
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arg_group.add_argument(
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"--rt-read-response",
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action="store_true",
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default=False,
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help="Enable additional retiming stage between readback fan-in and cpu interface"
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)
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arg_group.add_argument(
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"--rt-external",
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help="""Retime outputs to external components. Specify a
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comma-separated list of: reg,regfile,mem,addrmap,all"""
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)
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arg_group.add_argument(
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"--default-reset",
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choices=["rst", "rst_n", "arst", "arst_n"],
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default=None,
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help="""Choose the default style of reset signal if not explicitly
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specified by the SystemRDL design. If unspecified, the default reset
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is active-high and synchronous [rst]"""
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)
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arg_group.add_argument(
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"--err-if-bad-addr",
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action="store_true",
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default=False,
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help="""Generate CPUIF error response if a transaction attempts to
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access an address that does not map to anything."""
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)
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arg_group.add_argument(
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"--err-if-bad-rw",
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action="store_true",
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default=False,
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help="""Generate CPUIF error response if an illegal access is
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performed to a read-only or write-only register."""
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)
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def do_export(self, top_node: 'AddrmapNode', options: 'argparse.Namespace') -> None:
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cpuifs = self.get_cpuifs()
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retime_external_reg = False
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retime_external_regfile = False
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retime_external_mem = False
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retime_external_addrmap = False
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if options.rt_external:
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for key in options.rt_external.split(","):
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key = key.strip().lower()
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if key == "reg":
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retime_external_reg = True
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elif key == "regfile":
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retime_external_regfile = True
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elif key == "mem":
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retime_external_mem = True
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elif key == "addrmap":
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retime_external_addrmap = True
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elif key == "all":
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retime_external_reg = True
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retime_external_regfile = True
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retime_external_mem = True
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retime_external_addrmap = True
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else:
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print("error: invalid option for --rt-external: '%s'" % key, file=sys.stderr)
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# Get default reset. Favor command-line over cfg. Fall back to 'rst'
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default_rst = options.default_reset or self.cfg['default_reset'] or "rst"
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if default_rst == "rst":
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default_reset_activelow = False
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default_reset_async = False
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elif default_rst == "rst_n":
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default_reset_activelow = True
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default_reset_async = False
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elif default_rst == "arst":
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default_reset_activelow = False
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default_reset_async = True
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elif default_rst == "arst_n":
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default_reset_activelow = True
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default_reset_async = True
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else:
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raise RuntimeError
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x = RegblockExporter()
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x.export(
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top_node,
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options.output,
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cpuif_cls=cpuifs[options.cpuif],
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module_name=options.module_name,
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package_name=options.package_name,
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reuse_hwif_typedefs=(options.type_style == "lexical"),
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retime_read_fanin=options.rt_read_fanin,
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retime_read_response=options.rt_read_response,
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retime_external_reg=retime_external_reg,
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retime_external_regfile=retime_external_regfile,
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retime_external_mem=retime_external_mem,
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retime_external_addrmap=retime_external_addrmap,
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generate_hwif_report=options.hwif_report,
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address_width=options.addr_width,
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default_reset_activelow=default_reset_activelow,
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err_if_bad_addr=options.err_if_bad_addr or self.cfg['err_if_bad_addr'],
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err_if_bad_rw=options.err_if_bad_rw or self.cfg['err_if_bad_rw'],
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default_reset_async=default_reset_async,
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)
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