bslathi19/alibaba_pcie
1
0
Fork 0
Code Issues 2 Pull Requests Actions Packages Projects Releases Wiki Activity

Use taxi apb interface, finish reorg

Browse Source
This commit is contained in:
Byron Lathi
2025-11-22 16:07:56 -08:00
parent de33a46c78
commit 85cb3cc2a6
13 changed files with 209 additions and 230 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
src/alibaba_pcie_top.sv
View File

@@ -46,30 +46,20 @@ module alibaba_pcie(
taxi_axil_if m_axil_rd();
taxi_axil_if m_axil_wr();
taxi_apb_if #(.ADDR_W(9)) s_apb();
taxi_apb_if #(.ADDR_W(alibaba_pcie_top_regs_pkg::ALIBABA_PCIE_TOP_REGS_MIN_ADDR_WIDTH)) s_apb();
taxi_apb_if #(.ADDR_W(9)) m_apb[2]();
taxi_apb_if #(.ADDR_W(pcie_top_regs_pkg::PCIE_TOP_REGS_MIN_ADDR_WIDTH)) pcie_apb();
taxi_apb_if #(.ADDR_W(eth_dma_wrapper_regs_pkg::ETH_DMA_WRAPPER_REGS_MIN_ADDR_WIDTH)) eth_apb();
taxi_dma_ram_if #(.SEGS(4)) dma_ram_eth_rd_if();
taxi_dma_ram_if #(.SEGS(4)) dma_ram_eth_wr_if();
taxi_apb_interconnect #(
.M_CNT(2),
.ADDR_W(7),
.M_REGIONS(1),
.M_BASE_ADDR('0),
.M_ADDR_W({32'd6, 32'd6}),
.M_SECURE({2{1'b0}})
) u_apb_interconnect (
.clk (clk_250),
.rst (rst_250),
alibaba_pcie_top_regs u_alibaba_pcie_top_regs (
.s_apb (s_apb),
.m_apb (m_apb)
.m_apb_pcie_top_regs (pcie_apb),
.m_apb_eth_dma_wrapper_regs (eth_apb)
);
taxi_axil_apb_adapter u_taxi_axil_apb_adapter (
.clk (clk_250),
.rst (rst_250),
@@ -96,7 +86,7 @@ eth_dma_wrapper u_eth_dma_wrapper (
.wr_dma_mst (dma_ram_eth_wr_if),
.rd_dma_mst (dma_ram_eth_rd_if),
.s_apb (m_apb[1])
.s_apb (eth_apb)
);
pcie_top u_pcie_top(
@@ -117,7 +107,9 @@ pcie_top u_pcie_top(
.dma_ram_eth_rd_if (dma_ram_eth_rd_if),
.m_axil_rd (m_axil_rd),
.m_axil_wr (m_axil_wr)
.m_axil_wr (m_axil_wr),
.s_apb (pcie_apb)
);
endmodule