From fab665b765a6945463abdfeab624fe61f731564c Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Sun, 23 Nov 2025 22:58:15 -0800 Subject: [PATCH] Update test code --- src/regs/compile_regs.sh | 4 ++- sw/test/alibaba_pcie_top_regs.h | 1 + sw/test/pcie_dma_test.c | 52 +++++++++++++++++++++++---------- 3 files changed, 40 insertions(+), 17 deletions(-) create mode 120000 sw/test/alibaba_pcie_top_regs.h diff --git a/src/regs/compile_regs.sh b/src/regs/compile_regs.sh index 2226137..d46745c 100755 --- a/src/regs/compile_regs.sh +++ b/src/regs/compile_regs.sh @@ -1,4 +1,6 @@ SRCS="../pcie/regs/pcie_dma_regs.rdl ../pcie/regs/pcie_top_regs.rdl ../eth/regs/eth_mac_25g_us_regs.rdl ../eth/regs/eth_dma_wrapper_regs.rdl alibaba_pcie_top.rdl" peakrdl busdecoder -t alibaba_pcie_top_regs $SRCS -o . --cpuif taxi-apb -peakrdl python-regmap -t alibaba_pcie_top_regs $SRCS -o alibaba_pcie_top_regs.py \ No newline at end of file +peakrdl python-regmap -t alibaba_pcie_top_regs $SRCS -o alibaba_pcie_top_regs.py +peakrdl html -t alibaba_pcie_top_regs $SRCS -o html +peakrdl c-header -t alibaba_pcie_top_regs $SRCS -o alibaba_pcie_top_regs.h \ No newline at end of file diff --git a/sw/test/alibaba_pcie_top_regs.h b/sw/test/alibaba_pcie_top_regs.h new file mode 120000 index 0000000..3a9402c --- /dev/null +++ b/sw/test/alibaba_pcie_top_regs.h @@ -0,0 +1 @@ +../../src/regs/alibaba_pcie_top_regs.h \ No newline at end of file diff --git a/sw/test/pcie_dma_test.c b/sw/test/pcie_dma_test.c index 7b0c890..53adac8 100644 --- a/sw/test/pcie_dma_test.c +++ b/sw/test/pcie_dma_test.c @@ -7,6 +7,8 @@ #include #include +#include "alibaba_pcie_top_regs.h" + typedef struct { uint64_t pfn : 55; unsigned int soft_dirty : 1; @@ -105,8 +107,8 @@ int main(void) // this is hardcoded, seems to be deterministic. uint32_t pcie_physical_base_offset = 0xfe800000; int fd = open("/dev/mem", O_RDWR|O_SYNC); - uint32_t* pcie_base = (uint32_t*)mmap(0, 64, PROT_READ|PROT_WRITE, MAP_SHARED, fd, pcie_physical_base_offset); - printf("Virtual PCIe Base: %p\n", pcie_base); + alibaba_pcie_top_regs_t* top_regs = (alibaba_pcie_top_regs_t*)mmap(0, 64, PROT_READ|PROT_WRITE, MAP_SHARED, fd, pcie_physical_base_offset); + printf("Virtual PCIe Base: %p\n", top_regs); for (int i = 0; i < 2; i++) { @@ -119,34 +121,52 @@ int main(void) memset((void*)dst, 0, 1024); printf("Sending read DMA\n"); - pcie_base[0] = (uint32_t)src_phys; - pcie_base[1] = (uint32_t)(src_phys >> 32); - pcie_base[2] = dma_mem_addr; - pcie_base[3] = strlen(src); + top_regs->pcie_top_regs.pcie_dma_regs.dma_rd.src_addr_low = (uint32_t)src_phys; + top_regs->pcie_top_regs.pcie_dma_regs.dma_rd.src_addr_high = (uint32_t)(src_phys >> 32); + top_regs->pcie_top_regs.pcie_dma_regs.dma_rd.dst_addr = dma_mem_addr; + top_regs->pcie_top_regs.pcie_dma_regs.dma_rd.length = strlen(src); for (int i = 0; i < 4; i++) { - printf("pcie_base[%d] = %x\n", i, pcie_base[i]); + printf("top_regs[%d] = %x\n", i, (&top_regs->pcie_top_regs.pcie_dma_regs.dma_rd)[i]); } - pcie_base[4] = 1; - printf("%d\n", pcie_base[4]); + top_regs->pcie_top_regs.pcie_dma_regs.dma_rd.trigger = 1; + printf("%d\n", top_regs->pcie_top_regs.pcie_dma_regs.dma_rd.trigger); printf("\n\n"); printf("Sending write DMA\n"); + // we use dma_mem_addr twice, but these are actually 2 separate memories. + + // Set up stream to memory DMA to store ethernet frame + print("Setting up stream to memory DMA"); + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_wr.src_addr = 0; + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_wr.dst_addr_low = dma_mem_addr; + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_wr.dst_addr_high = 0; + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_wr.length = strlen(src); + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_wr.trigger = 1; + + // Trigger memory to stream dma to send ethernet frame + printf("Sending memory to stream DMA"); + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_rd.src_addr_low = dma_mem_addr; + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_rd.src_addr_high = 0; + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_rd.dst_addr = 0; + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_rd.length = strlen(src); + top_regs->eth_dma_wrapper_regs.pcie_dma_regs.dma_rd.trigger = 1; + printf("Sending read DMA\n"); - pcie_base[8] = (uint32_t)dst_phys; - pcie_base[9] = (uint32_t)(dst_phys >> 32); - pcie_base[10] = dma_mem_addr; - pcie_base[11] = strlen(src); + top_regs->pcie_top_regs.pcie_dma_regs.dma_wr.dst_addr_low = (uint32_t)dst_phys; + top_regs->pcie_top_regs.pcie_dma_regs.dma_wr.dst_addr_high = (uint32_t)(dst_phys >> 32); + top_regs->pcie_top_regs.pcie_dma_regs.dma_wr.src_addr = dma_mem_addr; + top_regs->pcie_top_regs.pcie_dma_regs.dma_wr.length = strlen(src); for (int i = 8; i < 12; i++) { - printf("pcie_base[%d] = %x\n", i, pcie_base[i]); + printf("pcie_base[%d] = %x\n", i, (&top_regs->pcie_top_regs.pcie_dma_regs.dma_wr)[i]); } - pcie_base[12] = 1; - printf("%d\n", pcie_base[12]); + top_regs->pcie_top_regs.pcie_dma_regs.dma_wr.trigger = 1; + printf("%d\n", top_regs->pcie_top_regs.pcie_dma_regs.dma_wr.trigger); printf("\n\n"); printf("strlen(dst)=%d\n", strlen(dst));